1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2020, Google LLC
4 *
5 * MAXIM TCPCI based TCPC driver
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/i2c.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/usb/pd.h>
14 #include <linux/usb/tcpm.h>
15 #include <linux/usb/typec.h>
16
17 #include "tcpci.h"
18
19 #define PD_ACTIVITY_TIMEOUT_MS 10000
20
21 #define TCPC_VENDOR_ALERT 0x80
22 #define TCPC_VENDOR_USBSW_CTRL 0x93
23 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9
24 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0
25
26 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0
27 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1
28 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2
29
30 /*
31 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
32 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
33 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
34 */
35 #define TCPC_RECEIVE_BUFFER_LEN 32
36
37 #define MAX_BUCK_BOOST_SID 0x69
38 #define MAX_BUCK_BOOST_OP 0xb9
39 #define MAX_BUCK_BOOST_OFF 0
40 #define MAX_BUCK_BOOST_SOURCE 0xa
41 #define MAX_BUCK_BOOST_SINK 0x5
42
43 struct max_tcpci_chip {
44 struct tcpci_data data;
45 struct tcpci *tcpci;
46 struct device *dev;
47 struct i2c_client *client;
48 struct tcpm_port *port;
49 };
50
51 static const struct regmap_range max_tcpci_tcpci_range[] = {
52 regmap_reg_range(0x00, 0x95)
53 };
54
55 static const struct regmap_access_table max_tcpci_tcpci_write_table = {
56 .yes_ranges = max_tcpci_tcpci_range,
57 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
58 };
59
60 static const struct regmap_config max_tcpci_regmap_config = {
61 .reg_bits = 8,
62 .val_bits = 8,
63 .max_register = 0x95,
64 .wr_table = &max_tcpci_tcpci_write_table,
65 };
66
tdata_to_max_tcpci(struct tcpci_data * tdata)67 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
68 {
69 return container_of(tdata, struct max_tcpci_chip, data);
70 }
71
max_tcpci_read16(struct max_tcpci_chip * chip,unsigned int reg,u16 * val)72 static int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val)
73 {
74 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
75 }
76
max_tcpci_write16(struct max_tcpci_chip * chip,unsigned int reg,u16 val)77 static int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val)
78 {
79 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
80 }
81
max_tcpci_read8(struct max_tcpci_chip * chip,unsigned int reg,u8 * val)82 static int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val)
83 {
84 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
85 }
86
max_tcpci_write8(struct max_tcpci_chip * chip,unsigned int reg,u8 val)87 static int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val)
88 {
89 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
90 }
91
max_tcpci_init_regs(struct max_tcpci_chip * chip)92 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
93 {
94 u16 alert_mask = 0;
95 int ret;
96
97 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
98 if (ret < 0) {
99 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
100 return;
101 }
102
103 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
104 if (ret < 0) {
105 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
106 return;
107 }
108
109 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
110 if (ret < 0) {
111 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
112 return;
113 }
114
115 /* Enable VSAFE0V detection */
116 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V);
117 if (ret < 0) {
118 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret);
119 return;
120 }
121
122 alert_mask = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_TX_FAILED |
123 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_RX_STATUS | TCPC_ALERT_CC_STATUS |
124 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF | TCPC_ALERT_POWER_STATUS |
125 /* Enable Extended alert for detecting Fast Role Swap Signal */
126 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS;
127
128 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
129 if (ret < 0) {
130 dev_err(chip->dev,
131 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
132 return;
133 }
134
135 /* Enable vbus voltage monitoring and voltage alerts */
136 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
137 if (ret < 0) {
138 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
139 return;
140 }
141
142 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
143 if (ret < 0)
144 return;
145 }
146
process_rx(struct max_tcpci_chip * chip,u16 status)147 static void process_rx(struct max_tcpci_chip *chip, u16 status)
148 {
149 struct pd_message msg;
150 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
151 int ret, payload_index;
152 u8 *rx_buf_ptr;
153
154 /*
155 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
156 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
157 * Read the count and frame type.
158 */
159 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
160 if (ret < 0) {
161 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret);
162 return;
163 }
164
165 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
166 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
167
168 if (count == 0 || frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP) {
169 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
170 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" :
171 "error frame_type is not SOP");
172 return;
173 }
174
175 if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
176 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
177 return;
178 }
179
180 /*
181 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
182 * TCPC_RX_BYTE_CNT
183 */
184 count += 1;
185 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
186 if (ret < 0) {
187 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret);
188 return;
189 }
190
191 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
192 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
193 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
194 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
195 rx_buf_ptr += sizeof(msg.payload[0]))
196 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
197
198 /*
199 * Read complete, clear RX status alert bit.
200 * Clear overflow as well if set.
201 */
202 ret = max_tcpci_write16(chip, TCPC_ALERT, status & TCPC_ALERT_RX_BUF_OVF ?
203 TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF :
204 TCPC_ALERT_RX_STATUS);
205 if (ret < 0)
206 return;
207
208 tcpm_pd_receive(chip->port, &msg);
209 }
210
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)211 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
212 {
213 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
214 u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE};
215 u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK};
216 u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF};
217 struct i2c_client *i2c = chip->client;
218 int ret;
219
220 struct i2c_msg msgs[] = {
221 {
222 .addr = MAX_BUCK_BOOST_SID,
223 .flags = i2c->flags & I2C_M_TEN,
224 .len = 2,
225 .buf = source ? buffer_source : sink ? buffer_sink : buffer_none,
226 },
227 };
228
229 if (source && sink) {
230 dev_err(chip->dev, "Both source and sink set\n");
231 return -EINVAL;
232 }
233
234 ret = i2c_transfer(i2c->adapter, msgs, 1);
235
236 return ret < 0 ? ret : 1;
237 }
238
process_power_status(struct max_tcpci_chip * chip)239 static void process_power_status(struct max_tcpci_chip *chip)
240 {
241 u8 pwr_status;
242 int ret;
243
244 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
245 if (ret < 0)
246 return;
247
248 if (pwr_status == 0xff)
249 max_tcpci_init_regs(chip);
250 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
251 tcpm_sourcing_vbus(chip->port);
252 else
253 tcpm_vbus_change(chip->port);
254 }
255
max_tcpci_frs_sourcing_vbus(struct tcpci * tcpci,struct tcpci_data * tdata)256 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata)
257 {
258 /*
259 * For Fast Role Swap case, Boost turns on autonomously without
260 * AP intervention, but, needs AP to enable source mode explicitly
261 * for AP to regain control.
262 */
263 max_tcpci_set_vbus(tcpci, tdata, true, false);
264 }
265
process_tx(struct max_tcpci_chip * chip,u16 status)266 static void process_tx(struct max_tcpci_chip *chip, u16 status)
267 {
268 if (status & TCPC_ALERT_TX_SUCCESS)
269 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
270 else if (status & TCPC_ALERT_TX_DISCARDED)
271 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
272 else if (status & TCPC_ALERT_TX_FAILED)
273 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
274
275 /* Reinit regs as Hard reset sets them to default value */
276 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
277 max_tcpci_init_regs(chip);
278 }
279
280 /* Enable USB switches when partner is USB communications capable */
max_tcpci_set_partner_usb_comm_capable(struct tcpci * tcpci,struct tcpci_data * data,bool capable)281 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data,
282 bool capable)
283 {
284 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data);
285 int ret;
286
287 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ?
288 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA :
289 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA);
290
291 if (ret < 0)
292 dev_err(chip->dev, "Failed to enable USB switches");
293 }
294
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)295 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
296 {
297 u16 mask;
298 int ret;
299 u8 reg_status;
300
301 /*
302 * Clear alert status for everything except RX_STATUS, which shouldn't
303 * be cleared until we have successfully retrieved message.
304 */
305 if (status & ~TCPC_ALERT_RX_STATUS) {
306 mask = status & TCPC_ALERT_RX_BUF_OVF ?
307 status & ~(TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF) :
308 status & ~TCPC_ALERT_RX_STATUS;
309 ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
310 if (ret < 0) {
311 dev_err(chip->dev, "ALERT clear failed\n");
312 return ret;
313 }
314 }
315
316 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
317 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
318 TCPC_ALERT_RX_BUF_OVF));
319 if (ret < 0) {
320 dev_err(chip->dev, "ALERT clear failed\n");
321 return ret;
322 }
323 }
324
325 if (status & TCPC_ALERT_EXTND) {
326 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status);
327 if (ret < 0)
328 return ret;
329
330 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
331 if (ret < 0)
332 return ret;
333
334 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
335 dev_info(chip->dev, "FRS Signal\n");
336 tcpm_sink_frs(chip->port);
337 }
338 }
339
340 if (status & TCPC_ALERT_EXTENDED_STATUS) {
341 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status);
342 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V))
343 tcpm_vbus_change(chip->port);
344 }
345
346 if (status & TCPC_ALERT_RX_STATUS)
347 process_rx(chip, status);
348
349 if (status & TCPC_ALERT_VBUS_DISCNCT)
350 tcpm_vbus_change(chip->port);
351
352 if (status & TCPC_ALERT_CC_STATUS)
353 tcpm_cc_change(chip->port);
354
355 if (status & TCPC_ALERT_POWER_STATUS)
356 process_power_status(chip);
357
358 if (status & TCPC_ALERT_RX_HARD_RST) {
359 tcpm_pd_hard_reset(chip->port);
360 max_tcpci_init_regs(chip);
361 }
362
363 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
364 TCPC_ALERT_TX_FAILED)
365 process_tx(chip, status);
366
367 return IRQ_HANDLED;
368 }
369
max_tcpci_irq(int irq,void * dev_id)370 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
371 {
372 struct max_tcpci_chip *chip = dev_id;
373 u16 status;
374 irqreturn_t irq_return = IRQ_HANDLED;
375 int ret;
376
377 if (!chip->port)
378 return IRQ_HANDLED;
379
380 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
381 if (ret < 0) {
382 dev_err(chip->dev, "ALERT read failed\n");
383 return ret;
384 }
385 while (status) {
386 irq_return = _max_tcpci_irq(chip, status);
387 /* Do not return if the ALERT is already set. */
388 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
389 if (ret < 0)
390 break;
391 }
392
393 return irq_return;
394 }
395
max_tcpci_isr(int irq,void * dev_id)396 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
397 {
398 struct max_tcpci_chip *chip = dev_id;
399
400 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
401
402 if (!chip->port)
403 return IRQ_HANDLED;
404
405 return IRQ_WAKE_THREAD;
406 }
407
max_tcpci_init_alert(struct max_tcpci_chip * chip,struct i2c_client * client)408 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client)
409 {
410 int ret;
411
412 ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
413 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
414 chip);
415
416 if (ret < 0)
417 return ret;
418
419 enable_irq_wake(client->irq);
420 return 0;
421 }
422
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)423 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
424 enum typec_cc_status cc)
425 {
426 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
427
428 max_tcpci_init_regs(chip);
429
430 return 0;
431 }
432
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)433 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
434 {
435 /*
436 * Generic TCPCI overwrites the regs once this driver initializes
437 * them. Prevent this by returning -1.
438 */
439 return -1;
440 }
441
max_tcpci_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)442 static int max_tcpci_probe(struct i2c_client *client, const struct i2c_device_id *i2c_id)
443 {
444 int ret;
445 struct max_tcpci_chip *chip;
446 u8 power_status;
447
448 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
449 if (!chip)
450 return -ENOMEM;
451
452 chip->client = client;
453 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
454 if (IS_ERR(chip->data.regmap)) {
455 dev_err(&client->dev, "Regmap init failed\n");
456 return PTR_ERR(chip->data.regmap);
457 }
458
459 chip->dev = &client->dev;
460 i2c_set_clientdata(client, chip);
461
462 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
463 if (ret < 0)
464 return ret;
465
466 /* Chip level tcpci callbacks */
467 chip->data.set_vbus = max_tcpci_set_vbus;
468 chip->data.start_drp_toggling = max_tcpci_start_toggling;
469 chip->data.TX_BUF_BYTE_x_hidden = true;
470 chip->data.init = tcpci_init;
471 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
472 chip->data.auto_discharge_disconnect = true;
473 chip->data.vbus_vsafe0v = true;
474 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
475
476 max_tcpci_init_regs(chip);
477 chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
478 if (IS_ERR(chip->tcpci)) {
479 dev_err(&client->dev, "TCPCI port registration failed\n");
480 return PTR_ERR(chip->tcpci);
481 }
482 chip->port = tcpci_get_tcpm_port(chip->tcpci);
483 ret = max_tcpci_init_alert(chip, client);
484 if (ret < 0)
485 goto unreg_port;
486
487 device_init_wakeup(chip->dev, true);
488 return 0;
489
490 unreg_port:
491 tcpci_unregister_port(chip->tcpci);
492
493 return ret;
494 }
495
max_tcpci_remove(struct i2c_client * client)496 static int max_tcpci_remove(struct i2c_client *client)
497 {
498 struct max_tcpci_chip *chip = i2c_get_clientdata(client);
499
500 if (!IS_ERR_OR_NULL(chip->tcpci))
501 tcpci_unregister_port(chip->tcpci);
502
503 return 0;
504 }
505
506 static const struct i2c_device_id max_tcpci_id[] = {
507 { "maxtcpc", 0 },
508 { }
509 };
510 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
511
512 #ifdef CONFIG_OF
513 static const struct of_device_id max_tcpci_of_match[] = {
514 { .compatible = "maxim,max33359", },
515 {},
516 };
517 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
518 #endif
519
520 static struct i2c_driver max_tcpci_i2c_driver = {
521 .driver = {
522 .name = "maxtcpc",
523 .of_match_table = of_match_ptr(max_tcpci_of_match),
524 },
525 .probe = max_tcpci_probe,
526 .remove = max_tcpci_remove,
527 .id_table = max_tcpci_id,
528 };
529 module_i2c_driver(max_tcpci_i2c_driver);
530
531 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
532 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
533 MODULE_LICENSE("GPL v2");
534
