1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * smc911x.c
4 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 *
6 * Copyright (C) 2005 Sensoria Corp
7 * Derived from the unified SMC91x driver by Nicolas Pitre
8 * and the smsc911x.c reference driver by SMSC
9 *
10 * Arguments:
11 * watchdog = TX watchdog timeout
12 * tx_fifo_kb = Size of TX FIFO in KB
13 *
14 * History:
15 * 04/16/05 Dustin McIntire Initial version
16 */
17 static const char version[] =
18 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
19
20 /* Debugging options */
21 #define ENABLE_SMC_DEBUG_RX 0
22 #define ENABLE_SMC_DEBUG_TX 0
23 #define ENABLE_SMC_DEBUG_DMA 0
24 #define ENABLE_SMC_DEBUG_PKTS 0
25 #define ENABLE_SMC_DEBUG_MISC 0
26 #define ENABLE_SMC_DEBUG_FUNC 0
27
28 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
29 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
30 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
31 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
32 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
33 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
34
35 #ifndef SMC_DEBUG
36 #define SMC_DEBUG ( SMC_DEBUG_RX | \
37 SMC_DEBUG_TX | \
38 SMC_DEBUG_DMA | \
39 SMC_DEBUG_PKTS | \
40 SMC_DEBUG_MISC | \
41 SMC_DEBUG_FUNC \
42 )
43 #endif
44
45 #include <linux/module.h>
46 #include <linux/kernel.h>
47 #include <linux/sched.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
50 #include <linux/errno.h>
51 #include <linux/ioport.h>
52 #include <linux/crc32.h>
53 #include <linux/device.h>
54 #include <linux/platform_device.h>
55 #include <linux/spinlock.h>
56 #include <linux/ethtool.h>
57 #include <linux/mii.h>
58 #include <linux/workqueue.h>
59
60 #include <linux/netdevice.h>
61 #include <linux/etherdevice.h>
62 #include <linux/skbuff.h>
63
64 #include <linux/dmaengine.h>
65
66 #include <asm/io.h>
67
68 #include "smc911x.h"
69
70 /*
71 * Transmit timeout, default 5 seconds.
72 */
73 static int watchdog = 5000;
74 module_param(watchdog, int, 0400);
75 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
76
77 static int tx_fifo_kb=8;
78 module_param(tx_fifo_kb, int, 0400);
79 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
80
81 MODULE_LICENSE("GPL");
82 MODULE_ALIAS("platform:smc911x");
83
84 /*
85 * The internal workings of the driver. If you are changing anything
86 * here with the SMC stuff, you should have the datasheet and know
87 * what you are doing.
88 */
89 #define CARDNAME "smc911x"
90
91 /*
92 * Use power-down feature of the chip
93 */
94 #define POWER_DOWN 1
95
96 #if SMC_DEBUG > 0
97 #define DBG(n, dev, args...) \
98 do { \
99 if (SMC_DEBUG & (n)) \
100 netdev_dbg(dev, args); \
101 } while (0)
102
103 #define PRINTK(dev, args...) netdev_info(dev, args)
104 #else
105 #define DBG(n, dev, args...) \
106 while (0) { \
107 netdev_dbg(dev, args); \
108 }
109 #define PRINTK(dev, args...) netdev_dbg(dev, args)
110 #endif
111
112 #if SMC_DEBUG_PKTS > 0
PRINT_PKT(u_char * buf,int length)113 static void PRINT_PKT(u_char *buf, int length)
114 {
115 int i;
116 int remainder;
117 int lines;
118
119 lines = length / 16;
120 remainder = length % 16;
121
122 for (i = 0; i < lines ; i ++) {
123 int cur;
124 printk(KERN_DEBUG);
125 for (cur = 0; cur < 8; cur++) {
126 u_char a, b;
127 a = *buf++;
128 b = *buf++;
129 pr_cont("%02x%02x ", a, b);
130 }
131 pr_cont("\n");
132 }
133 printk(KERN_DEBUG);
134 for (i = 0; i < remainder/2 ; i++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 pr_cont("%02x%02x ", a, b);
139 }
140 pr_cont("\n");
141 }
142 #else
143 #define PRINT_PKT(x...) do { } while (0)
144 #endif
145
146
147 /* this enables an interrupt in the interrupt mask register */
148 #define SMC_ENABLE_INT(lp, x) do { \
149 unsigned int __mask; \
150 __mask = SMC_GET_INT_EN((lp)); \
151 __mask |= (x); \
152 SMC_SET_INT_EN((lp), __mask); \
153 } while (0)
154
155 /* this disables an interrupt from the interrupt mask register */
156 #define SMC_DISABLE_INT(lp, x) do { \
157 unsigned int __mask; \
158 __mask = SMC_GET_INT_EN((lp)); \
159 __mask &= ~(x); \
160 SMC_SET_INT_EN((lp), __mask); \
161 } while (0)
162
163 /*
164 * this does a soft reset on the device
165 */
smc911x_reset(struct net_device * dev)166 static void smc911x_reset(struct net_device *dev)
167 {
168 struct smc911x_local *lp = netdev_priv(dev);
169 unsigned int reg, timeout=0, resets=1, irq_cfg;
170 unsigned long flags;
171
172 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
173
174 /* Take out of PM setting first */
175 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
176 /* Write to the bytetest will take out of powerdown */
177 SMC_SET_BYTE_TEST(lp, 0);
178 timeout=10;
179 do {
180 udelay(10);
181 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
182 } while (--timeout && !reg);
183 if (timeout == 0) {
184 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
185 return;
186 }
187 }
188
189 /* Disable all interrupts */
190 spin_lock_irqsave(&lp->lock, flags);
191 SMC_SET_INT_EN(lp, 0);
192 spin_unlock_irqrestore(&lp->lock, flags);
193
194 while (resets--) {
195 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
196 timeout=10;
197 do {
198 udelay(10);
199 reg = SMC_GET_HW_CFG(lp);
200 /* If chip indicates reset timeout then try again */
201 if (reg & HW_CFG_SRST_TO_) {
202 PRINTK(dev, "chip reset timeout, retrying...\n");
203 resets++;
204 break;
205 }
206 } while (--timeout && (reg & HW_CFG_SRST_));
207 }
208 if (timeout == 0) {
209 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
210 return;
211 }
212
213 /* make sure EEPROM has finished loading before setting GPIO_CFG */
214 timeout=1000;
215 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
216 udelay(10);
217
218 if (timeout == 0){
219 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
220 return;
221 }
222
223 /* Initialize interrupts */
224 SMC_SET_INT_EN(lp, 0);
225 SMC_ACK_INT(lp, -1);
226
227 /* Reset the FIFO level and flow control settings */
228 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
229 //TODO: Figure out what appropriate pause time is
230 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
231 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
232
233
234 /* Set to LED outputs */
235 SMC_SET_GPIO_CFG(lp, 0x70070000);
236
237 /*
238 * Deassert IRQ for 1*10us for edge type interrupts
239 * and drive IRQ pin push-pull
240 */
241 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
242 #ifdef SMC_DYNAMIC_BUS_CONFIG
243 if (lp->cfg.irq_polarity)
244 irq_cfg |= INT_CFG_IRQ_POL_;
245 #endif
246 SMC_SET_IRQ_CFG(lp, irq_cfg);
247
248 /* clear anything saved */
249 if (lp->pending_tx_skb != NULL) {
250 dev_kfree_skb (lp->pending_tx_skb);
251 lp->pending_tx_skb = NULL;
252 dev->stats.tx_errors++;
253 dev->stats.tx_aborted_errors++;
254 }
255 }
256
257 /*
258 * Enable Interrupts, Receive, and Transmit
259 */
smc911x_enable(struct net_device * dev)260 static void smc911x_enable(struct net_device *dev)
261 {
262 struct smc911x_local *lp = netdev_priv(dev);
263 unsigned mask, cfg, cr;
264 unsigned long flags;
265
266 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
267
268 spin_lock_irqsave(&lp->lock, flags);
269
270 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
271
272 /* Enable TX */
273 cfg = SMC_GET_HW_CFG(lp);
274 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
275 cfg |= HW_CFG_SF_;
276 SMC_SET_HW_CFG(lp, cfg);
277 SMC_SET_FIFO_TDA(lp, 0xFF);
278 /* Update TX stats on every 64 packets received or every 1 sec */
279 SMC_SET_FIFO_TSL(lp, 64);
280 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
281
282 SMC_GET_MAC_CR(lp, cr);
283 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
284 SMC_SET_MAC_CR(lp, cr);
285 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
286
287 /* Add 2 byte padding to start of packets */
288 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
289
290 /* Turn on receiver and enable RX */
291 if (cr & MAC_CR_RXEN_)
292 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
293
294 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
295
296 /* Interrupt on every received packet */
297 SMC_SET_FIFO_RSA(lp, 0x01);
298 SMC_SET_FIFO_RSL(lp, 0x00);
299
300 /* now, enable interrupts */
301 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
302 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
303 INT_EN_PHY_INT_EN_;
304 if (IS_REV_A(lp->revision))
305 mask|=INT_EN_RDFL_EN_;
306 else {
307 mask|=INT_EN_RDFO_EN_;
308 }
309 SMC_ENABLE_INT(lp, mask);
310
311 spin_unlock_irqrestore(&lp->lock, flags);
312 }
313
314 /*
315 * this puts the device in an inactive state
316 */
smc911x_shutdown(struct net_device * dev)317 static void smc911x_shutdown(struct net_device *dev)
318 {
319 struct smc911x_local *lp = netdev_priv(dev);
320 unsigned cr;
321 unsigned long flags;
322
323 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
324
325 /* Disable IRQ's */
326 SMC_SET_INT_EN(lp, 0);
327
328 /* Turn of Rx and TX */
329 spin_lock_irqsave(&lp->lock, flags);
330 SMC_GET_MAC_CR(lp, cr);
331 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
332 SMC_SET_MAC_CR(lp, cr);
333 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
334 spin_unlock_irqrestore(&lp->lock, flags);
335 }
336
smc911x_drop_pkt(struct net_device * dev)337 static inline void smc911x_drop_pkt(struct net_device *dev)
338 {
339 struct smc911x_local *lp = netdev_priv(dev);
340 unsigned int fifo_count, timeout, reg;
341
342 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
343 CARDNAME, __func__);
344 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
345 if (fifo_count <= 4) {
346 /* Manually dump the packet data */
347 while (fifo_count--)
348 SMC_GET_RX_FIFO(lp);
349 } else {
350 /* Fast forward through the bad packet */
351 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
352 timeout=50;
353 do {
354 udelay(10);
355 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
356 } while (--timeout && reg);
357 if (timeout == 0) {
358 PRINTK(dev, "timeout waiting for RX fast forward\n");
359 }
360 }
361 }
362
363 /*
364 * This is the procedure to handle the receipt of a packet.
365 * It should be called after checking for packet presence in
366 * the RX status FIFO. It must be called with the spin lock
367 * already held.
368 */
smc911x_rcv(struct net_device * dev)369 static inline void smc911x_rcv(struct net_device *dev)
370 {
371 struct smc911x_local *lp = netdev_priv(dev);
372 unsigned int pkt_len, status;
373 struct sk_buff *skb;
374 unsigned char *data;
375
376 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
377 __func__);
378 status = SMC_GET_RX_STS_FIFO(lp);
379 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
380 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
381 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
382 if (status & RX_STS_ES_) {
383 /* Deal with a bad packet */
384 dev->stats.rx_errors++;
385 if (status & RX_STS_CRC_ERR_)
386 dev->stats.rx_crc_errors++;
387 else {
388 if (status & RX_STS_LEN_ERR_)
389 dev->stats.rx_length_errors++;
390 if (status & RX_STS_MCAST_)
391 dev->stats.multicast++;
392 }
393 /* Remove the bad packet data from the RX FIFO */
394 smc911x_drop_pkt(dev);
395 } else {
396 /* Receive a valid packet */
397 /* Alloc a buffer with extra room for DMA alignment */
398 skb = netdev_alloc_skb(dev, pkt_len+32);
399 if (unlikely(skb == NULL)) {
400 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
401 dev->stats.rx_dropped++;
402 smc911x_drop_pkt(dev);
403 return;
404 }
405 /* Align IP header to 32 bits
406 * Note that the device is configured to add a 2
407 * byte padding to the packet start, so we really
408 * want to write to the orignal data pointer */
409 data = skb->data;
410 skb_reserve(skb, 2);
411 skb_put(skb,pkt_len-4);
412 #ifdef SMC_USE_DMA
413 {
414 unsigned int fifo;
415 /* Lower the FIFO threshold if possible */
416 fifo = SMC_GET_FIFO_INT(lp);
417 if (fifo & 0xFF) fifo--;
418 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
419 fifo & 0xff);
420 SMC_SET_FIFO_INT(lp, fifo);
421 /* Setup RX DMA */
422 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
423 lp->rxdma_active = 1;
424 lp->current_rx_skb = skb;
425 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
426 /* Packet processing deferred to DMA RX interrupt */
427 }
428 #else
429 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
430 SMC_PULL_DATA(lp, data, pkt_len+2+3);
431
432 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
433 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
434 skb->protocol = eth_type_trans(skb, dev);
435 netif_rx(skb);
436 dev->stats.rx_packets++;
437 dev->stats.rx_bytes += pkt_len-4;
438 #endif
439 }
440 }
441
442 /*
443 * This is called to actually send a packet to the chip.
444 */
smc911x_hardware_send_pkt(struct net_device * dev)445 static void smc911x_hardware_send_pkt(struct net_device *dev)
446 {
447 struct smc911x_local *lp = netdev_priv(dev);
448 struct sk_buff *skb;
449 unsigned int cmdA, cmdB, len;
450 unsigned char *buf;
451
452 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
453 BUG_ON(lp->pending_tx_skb == NULL);
454
455 skb = lp->pending_tx_skb;
456 lp->pending_tx_skb = NULL;
457
458 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
459 /* cmdB {31:16] pkt tag [10:0] length */
460 #ifdef SMC_USE_DMA
461 /* 16 byte buffer alignment mode */
462 buf = (char*)((u32)(skb->data) & ~0xF);
463 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
464 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
465 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
466 skb->len;
467 #else
468 buf = (char *)((uintptr_t)skb->data & ~0x3);
469 len = (skb->len + 3 + ((uintptr_t)skb->data & 3)) & ~0x3;
470 cmdA = (((uintptr_t)skb->data & 0x3) << 16) |
471 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
472 skb->len;
473 #endif
474 /* tag is packet length so we can use this in stats update later */
475 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
476
477 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
478 len, len, buf, cmdA, cmdB);
479 SMC_SET_TX_FIFO(lp, cmdA);
480 SMC_SET_TX_FIFO(lp, cmdB);
481
482 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
483 PRINT_PKT(buf, len <= 64 ? len : 64);
484
485 /* Send pkt via PIO or DMA */
486 #ifdef SMC_USE_DMA
487 lp->current_tx_skb = skb;
488 SMC_PUSH_DATA(lp, buf, len);
489 /* DMA complete IRQ will free buffer and set jiffies */
490 #else
491 SMC_PUSH_DATA(lp, buf, len);
492 netif_trans_update(dev);
493 dev_kfree_skb_irq(skb);
494 #endif
495 if (!lp->tx_throttle) {
496 netif_wake_queue(dev);
497 }
498 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
499 }
500
501 /*
502 * Since I am not sure if I will have enough room in the chip's ram
503 * to store the packet, I call this routine which either sends it
504 * now, or set the card to generates an interrupt when ready
505 * for the packet.
506 */
507 static netdev_tx_t
smc911x_hard_start_xmit(struct sk_buff * skb,struct net_device * dev)508 smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
509 {
510 struct smc911x_local *lp = netdev_priv(dev);
511 unsigned int free;
512 unsigned long flags;
513
514 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
515 __func__);
516
517 spin_lock_irqsave(&lp->lock, flags);
518
519 BUG_ON(lp->pending_tx_skb != NULL);
520
521 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
522 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
523
524 /* Turn off the flow when running out of space in FIFO */
525 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
526 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
527 free);
528 /* Reenable when at least 1 packet of size MTU present */
529 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
530 lp->tx_throttle = 1;
531 netif_stop_queue(dev);
532 }
533
534 /* Drop packets when we run out of space in TX FIFO
535 * Account for overhead required for:
536 *
537 * Tx command words 8 bytes
538 * Start offset 15 bytes
539 * End padding 15 bytes
540 */
541 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
542 netdev_warn(dev, "No Tx free space %d < %d\n",
543 free, skb->len);
544 lp->pending_tx_skb = NULL;
545 dev->stats.tx_errors++;
546 dev->stats.tx_dropped++;
547 spin_unlock_irqrestore(&lp->lock, flags);
548 dev_kfree_skb_any(skb);
549 return NETDEV_TX_OK;
550 }
551
552 #ifdef SMC_USE_DMA
553 {
554 /* If the DMA is already running then defer this packet Tx until
555 * the DMA IRQ starts it
556 */
557 if (lp->txdma_active) {
558 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
559 lp->pending_tx_skb = skb;
560 netif_stop_queue(dev);
561 spin_unlock_irqrestore(&lp->lock, flags);
562 return NETDEV_TX_OK;
563 } else {
564 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
565 lp->txdma_active = 1;
566 }
567 }
568 #endif
569 lp->pending_tx_skb = skb;
570 smc911x_hardware_send_pkt(dev);
571 spin_unlock_irqrestore(&lp->lock, flags);
572
573 return NETDEV_TX_OK;
574 }
575
576 /*
577 * This handles a TX status interrupt, which is only called when:
578 * - a TX error occurred, or
579 * - TX of a packet completed.
580 */
smc911x_tx(struct net_device * dev)581 static void smc911x_tx(struct net_device *dev)
582 {
583 struct smc911x_local *lp = netdev_priv(dev);
584 unsigned int tx_status;
585
586 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
587 __func__);
588
589 /* Collect the TX status */
590 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
591 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
592 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
593 tx_status = SMC_GET_TX_STS_FIFO(lp);
594 dev->stats.tx_packets++;
595 dev->stats.tx_bytes+=tx_status>>16;
596 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
597 (tx_status & 0xffff0000) >> 16,
598 tx_status & 0x0000ffff);
599 /* count Tx errors, but ignore lost carrier errors when in
600 * full-duplex mode */
601 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
602 !(tx_status & 0x00000306))) {
603 dev->stats.tx_errors++;
604 }
605 if (tx_status & TX_STS_MANY_COLL_) {
606 dev->stats.collisions+=16;
607 dev->stats.tx_aborted_errors++;
608 } else {
609 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
610 }
611 /* carrier error only has meaning for half-duplex communication */
612 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
613 !lp->ctl_rfduplx) {
614 dev->stats.tx_carrier_errors++;
615 }
616 if (tx_status & TX_STS_LATE_COLL_) {
617 dev->stats.collisions++;
618 dev->stats.tx_aborted_errors++;
619 }
620 }
621 }
622
623
624 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
625 /*
626 * Reads a register from the MII Management serial interface
627 */
628
smc911x_phy_read(struct net_device * dev,int phyaddr,int phyreg)629 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
630 {
631 struct smc911x_local *lp = netdev_priv(dev);
632 unsigned int phydata;
633
634 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
635
636 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
637 __func__, phyaddr, phyreg, phydata);
638 return phydata;
639 }
640
641
642 /*
643 * Writes a register to the MII Management serial interface
644 */
smc911x_phy_write(struct net_device * dev,int phyaddr,int phyreg,int phydata)645 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
646 int phydata)
647 {
648 struct smc911x_local *lp = netdev_priv(dev);
649
650 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
651 __func__, phyaddr, phyreg, phydata);
652
653 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
654 }
655
656 /*
657 * Finds and reports the PHY address (115 and 117 have external
658 * PHY interface 118 has internal only
659 */
smc911x_phy_detect(struct net_device * dev)660 static void smc911x_phy_detect(struct net_device *dev)
661 {
662 struct smc911x_local *lp = netdev_priv(dev);
663 int phyaddr;
664 unsigned int cfg, id1, id2;
665
666 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
667
668 lp->phy_type = 0;
669
670 /*
671 * Scan all 32 PHY addresses if necessary, starting at
672 * PHY#1 to PHY#31, and then PHY#0 last.
673 */
674 switch(lp->version) {
675 case CHIP_9115:
676 case CHIP_9117:
677 case CHIP_9215:
678 case CHIP_9217:
679 cfg = SMC_GET_HW_CFG(lp);
680 if (cfg & HW_CFG_EXT_PHY_DET_) {
681 cfg &= ~HW_CFG_PHY_CLK_SEL_;
682 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
683 SMC_SET_HW_CFG(lp, cfg);
684 udelay(10); /* Wait for clocks to stop */
685
686 cfg |= HW_CFG_EXT_PHY_EN_;
687 SMC_SET_HW_CFG(lp, cfg);
688 udelay(10); /* Wait for clocks to stop */
689
690 cfg &= ~HW_CFG_PHY_CLK_SEL_;
691 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
692 SMC_SET_HW_CFG(lp, cfg);
693 udelay(10); /* Wait for clocks to stop */
694
695 cfg |= HW_CFG_SMI_SEL_;
696 SMC_SET_HW_CFG(lp, cfg);
697
698 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
699
700 /* Read the PHY identifiers */
701 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
702 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
703
704 /* Make sure it is a valid identifier */
705 if (id1 != 0x0000 && id1 != 0xffff &&
706 id1 != 0x8000 && id2 != 0x0000 &&
707 id2 != 0xffff && id2 != 0x8000) {
708 /* Save the PHY's address */
709 lp->mii.phy_id = phyaddr & 31;
710 lp->phy_type = id1 << 16 | id2;
711 break;
712 }
713 }
714 if (phyaddr < 32)
715 /* Found an external PHY */
716 break;
717 }
718 fallthrough;
719 default:
720 /* Internal media only */
721 SMC_GET_PHY_ID1(lp, 1, id1);
722 SMC_GET_PHY_ID2(lp, 1, id2);
723 /* Save the PHY's address */
724 lp->mii.phy_id = 1;
725 lp->phy_type = id1 << 16 | id2;
726 }
727
728 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
729 id1, id2, lp->mii.phy_id);
730 }
731
732 /*
733 * Sets the PHY to a configuration as determined by the user.
734 * Called with spin_lock held.
735 */
smc911x_phy_fixed(struct net_device * dev)736 static int smc911x_phy_fixed(struct net_device *dev)
737 {
738 struct smc911x_local *lp = netdev_priv(dev);
739 int phyaddr = lp->mii.phy_id;
740 int bmcr;
741
742 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
743
744 /* Enter Link Disable state */
745 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
746 bmcr |= BMCR_PDOWN;
747 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
748
749 /*
750 * Set our fixed capabilities
751 * Disable auto-negotiation
752 */
753 bmcr &= ~BMCR_ANENABLE;
754 if (lp->ctl_rfduplx)
755 bmcr |= BMCR_FULLDPLX;
756
757 if (lp->ctl_rspeed == 100)
758 bmcr |= BMCR_SPEED100;
759
760 /* Write our capabilities to the phy control register */
761 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
762
763 /* Re-Configure the Receive/Phy Control register */
764 bmcr &= ~BMCR_PDOWN;
765 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
766
767 return 1;
768 }
769
770 /**
771 * smc911x_phy_reset - reset the phy
772 * @dev: net device
773 * @phy: phy address
774 *
775 * Issue a software reset for the specified PHY and
776 * wait up to 100ms for the reset to complete. We should
777 * not access the PHY for 50ms after issuing the reset.
778 *
779 * The time to wait appears to be dependent on the PHY.
780 *
781 */
smc911x_phy_reset(struct net_device * dev,int phy)782 static int smc911x_phy_reset(struct net_device *dev, int phy)
783 {
784 struct smc911x_local *lp = netdev_priv(dev);
785 int timeout;
786 unsigned long flags;
787 unsigned int reg;
788
789 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
790
791 spin_lock_irqsave(&lp->lock, flags);
792 reg = SMC_GET_PMT_CTRL(lp);
793 reg &= ~0xfffff030;
794 reg |= PMT_CTRL_PHY_RST_;
795 SMC_SET_PMT_CTRL(lp, reg);
796 spin_unlock_irqrestore(&lp->lock, flags);
797 for (timeout = 2; timeout; timeout--) {
798 msleep(50);
799 spin_lock_irqsave(&lp->lock, flags);
800 reg = SMC_GET_PMT_CTRL(lp);
801 spin_unlock_irqrestore(&lp->lock, flags);
802 if (!(reg & PMT_CTRL_PHY_RST_)) {
803 /* extra delay required because the phy may
804 * not be completed with its reset
805 * when PHY_BCR_RESET_ is cleared. 256us
806 * should suffice, but use 500us to be safe
807 */
808 udelay(500);
809 break;
810 }
811 }
812
813 return reg & PMT_CTRL_PHY_RST_;
814 }
815
816 /**
817 * smc911x_phy_powerdown - powerdown phy
818 * @dev: net device
819 * @phy: phy address
820 *
821 * Power down the specified PHY
822 */
smc911x_phy_powerdown(struct net_device * dev,int phy)823 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
824 {
825 struct smc911x_local *lp = netdev_priv(dev);
826 unsigned int bmcr;
827
828 /* Enter Link Disable state */
829 SMC_GET_PHY_BMCR(lp, phy, bmcr);
830 bmcr |= BMCR_PDOWN;
831 SMC_SET_PHY_BMCR(lp, phy, bmcr);
832 }
833
834 /**
835 * smc911x_phy_check_media - check the media status and adjust BMCR
836 * @dev: net device
837 * @init: set true for initialisation
838 *
839 * Select duplex mode depending on negotiation state. This
840 * also updates our carrier state.
841 */
smc911x_phy_check_media(struct net_device * dev,int init)842 static void smc911x_phy_check_media(struct net_device *dev, int init)
843 {
844 struct smc911x_local *lp = netdev_priv(dev);
845 int phyaddr = lp->mii.phy_id;
846 unsigned int bmcr, cr;
847
848 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
849
850 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
851 /* duplex state has changed */
852 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
853 SMC_GET_MAC_CR(lp, cr);
854 if (lp->mii.full_duplex) {
855 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
856 bmcr |= BMCR_FULLDPLX;
857 cr |= MAC_CR_RCVOWN_;
858 } else {
859 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
860 bmcr &= ~BMCR_FULLDPLX;
861 cr &= ~MAC_CR_RCVOWN_;
862 }
863 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
864 SMC_SET_MAC_CR(lp, cr);
865 }
866 }
867
868 /*
869 * Configures the specified PHY through the MII management interface
870 * using Autonegotiation.
871 * Calls smc911x_phy_fixed() if the user has requested a certain config.
872 * If RPC ANEG bit is set, the media selection is dependent purely on
873 * the selection by the MII (either in the MII BMCR reg or the result
874 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
875 * is controlled by the RPC SPEED and RPC DPLX bits.
876 */
smc911x_phy_configure(struct work_struct * work)877 static void smc911x_phy_configure(struct work_struct *work)
878 {
879 struct smc911x_local *lp = container_of(work, struct smc911x_local,
880 phy_configure);
881 struct net_device *dev = lp->netdev;
882 int phyaddr = lp->mii.phy_id;
883 int my_phy_caps; /* My PHY capabilities */
884 int my_ad_caps; /* My Advertised capabilities */
885 int status __always_unused;
886 unsigned long flags;
887
888 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
889
890 /*
891 * We should not be called if phy_type is zero.
892 */
893 if (lp->phy_type == 0)
894 return;
895
896 if (smc911x_phy_reset(dev, phyaddr)) {
897 netdev_info(dev, "PHY reset timed out\n");
898 return;
899 }
900 spin_lock_irqsave(&lp->lock, flags);
901
902 /*
903 * Enable PHY Interrupts (for register 18)
904 * Interrupts listed here are enabled
905 */
906 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
907 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
908 PHY_INT_MASK_LINK_DOWN_);
909
910 /* If the user requested no auto neg, then go set his request */
911 if (lp->mii.force_media) {
912 smc911x_phy_fixed(dev);
913 goto smc911x_phy_configure_exit;
914 }
915
916 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
917 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
918 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
919 netdev_info(dev, "Auto negotiation NOT supported\n");
920 smc911x_phy_fixed(dev);
921 goto smc911x_phy_configure_exit;
922 }
923
924 /* CSMA capable w/ both pauses */
925 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
926
927 if (my_phy_caps & BMSR_100BASE4)
928 my_ad_caps |= ADVERTISE_100BASE4;
929 if (my_phy_caps & BMSR_100FULL)
930 my_ad_caps |= ADVERTISE_100FULL;
931 if (my_phy_caps & BMSR_100HALF)
932 my_ad_caps |= ADVERTISE_100HALF;
933 if (my_phy_caps & BMSR_10FULL)
934 my_ad_caps |= ADVERTISE_10FULL;
935 if (my_phy_caps & BMSR_10HALF)
936 my_ad_caps |= ADVERTISE_10HALF;
937
938 /* Disable capabilities not selected by our user */
939 if (lp->ctl_rspeed != 100)
940 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
941
942 if (!lp->ctl_rfduplx)
943 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
944
945 /* Update our Auto-Neg Advertisement Register */
946 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
947 lp->mii.advertising = my_ad_caps;
948
949 /*
950 * Read the register back. Without this, it appears that when
951 * auto-negotiation is restarted, sometimes it isn't ready and
952 * the link does not come up.
953 */
954 udelay(10);
955 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
956
957 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
958 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
959
960 /* Restart auto-negotiation process in order to advertise my caps */
961 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
962
963 smc911x_phy_check_media(dev, 1);
964
965 smc911x_phy_configure_exit:
966 spin_unlock_irqrestore(&lp->lock, flags);
967 }
968
969 /*
970 * smc911x_phy_interrupt
971 *
972 * Purpose: Handle interrupts relating to PHY register 18. This is
973 * called from the "hard" interrupt handler under our private spinlock.
974 */
smc911x_phy_interrupt(struct net_device * dev)975 static void smc911x_phy_interrupt(struct net_device *dev)
976 {
977 struct smc911x_local *lp = netdev_priv(dev);
978 int phyaddr = lp->mii.phy_id;
979 int status __always_unused;
980
981 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
982
983 if (lp->phy_type == 0)
984 return;
985
986 smc911x_phy_check_media(dev, 0);
987 /* read to clear status bits */
988 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
989 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
990 status & 0xffff);
991 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
992 SMC_GET_AFC_CFG(lp));
993 }
994
995 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
996
997 /*
998 * This is the main routine of the driver, to handle the device when
999 * it needs some attention.
1000 */
smc911x_interrupt(int irq,void * dev_id)1001 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1002 {
1003 struct net_device *dev = dev_id;
1004 struct smc911x_local *lp = netdev_priv(dev);
1005 unsigned int status, mask, timeout;
1006 unsigned int rx_overrun=0, cr, pkts;
1007 unsigned long flags;
1008
1009 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1010
1011 spin_lock_irqsave(&lp->lock, flags);
1012
1013 /* Spurious interrupt check */
1014 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1015 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1016 spin_unlock_irqrestore(&lp->lock, flags);
1017 return IRQ_NONE;
1018 }
1019
1020 mask = SMC_GET_INT_EN(lp);
1021 SMC_SET_INT_EN(lp, 0);
1022
1023 /* set a timeout value, so I don't stay here forever */
1024 timeout = 8;
1025
1026
1027 do {
1028 status = SMC_GET_INT(lp);
1029
1030 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1031 status, mask, status & ~mask);
1032
1033 status &= mask;
1034 if (!status)
1035 break;
1036
1037 /* Handle SW interrupt condition */
1038 if (status & INT_STS_SW_INT_) {
1039 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1040 mask &= ~INT_EN_SW_INT_EN_;
1041 }
1042 /* Handle various error conditions */
1043 if (status & INT_STS_RXE_) {
1044 SMC_ACK_INT(lp, INT_STS_RXE_);
1045 dev->stats.rx_errors++;
1046 }
1047 if (status & INT_STS_RXDFH_INT_) {
1048 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1049 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1050 }
1051 /* Undocumented interrupt-what is the right thing to do here? */
1052 if (status & INT_STS_RXDF_INT_) {
1053 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1054 }
1055
1056 /* Rx Data FIFO exceeds set level */
1057 if (status & INT_STS_RDFL_) {
1058 if (IS_REV_A(lp->revision)) {
1059 rx_overrun=1;
1060 SMC_GET_MAC_CR(lp, cr);
1061 cr &= ~MAC_CR_RXEN_;
1062 SMC_SET_MAC_CR(lp, cr);
1063 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1064 dev->stats.rx_errors++;
1065 dev->stats.rx_fifo_errors++;
1066 }
1067 SMC_ACK_INT(lp, INT_STS_RDFL_);
1068 }
1069 if (status & INT_STS_RDFO_) {
1070 if (!IS_REV_A(lp->revision)) {
1071 SMC_GET_MAC_CR(lp, cr);
1072 cr &= ~MAC_CR_RXEN_;
1073 SMC_SET_MAC_CR(lp, cr);
1074 rx_overrun=1;
1075 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1076 dev->stats.rx_errors++;
1077 dev->stats.rx_fifo_errors++;
1078 }
1079 SMC_ACK_INT(lp, INT_STS_RDFO_);
1080 }
1081 /* Handle receive condition */
1082 if ((status & INT_STS_RSFL_) || rx_overrun) {
1083 unsigned int fifo;
1084 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1085 fifo = SMC_GET_RX_FIFO_INF(lp);
1086 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1087 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1088 pkts, fifo & 0xFFFF);
1089 if (pkts != 0) {
1090 #ifdef SMC_USE_DMA
1091 unsigned int fifo;
1092 if (lp->rxdma_active){
1093 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1094 "RX DMA active\n");
1095 /* The DMA is already running so up the IRQ threshold */
1096 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1097 fifo |= pkts & 0xFF;
1098 DBG(SMC_DEBUG_RX, dev,
1099 "Setting RX stat FIFO threshold to %d\n",
1100 fifo & 0xff);
1101 SMC_SET_FIFO_INT(lp, fifo);
1102 } else
1103 #endif
1104 smc911x_rcv(dev);
1105 }
1106 SMC_ACK_INT(lp, INT_STS_RSFL_);
1107 }
1108 /* Handle transmit FIFO available */
1109 if (status & INT_STS_TDFA_) {
1110 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1111 SMC_SET_FIFO_TDA(lp, 0xFF);
1112 lp->tx_throttle = 0;
1113 #ifdef SMC_USE_DMA
1114 if (!lp->txdma_active)
1115 #endif
1116 netif_wake_queue(dev);
1117 SMC_ACK_INT(lp, INT_STS_TDFA_);
1118 }
1119 /* Handle transmit done condition */
1120 #if 1
1121 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1122 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1123 "Tx stat FIFO limit (%d) /GPT irq\n",
1124 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1125 smc911x_tx(dev);
1126 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1127 SMC_ACK_INT(lp, INT_STS_TSFL_);
1128 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1129 }
1130 #else
1131 if (status & INT_STS_TSFL_) {
1132 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1133 smc911x_tx(dev);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 }
1136
1137 if (status & INT_STS_GPT_INT_) {
1138 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1139 SMC_GET_IRQ_CFG(lp),
1140 SMC_GET_FIFO_INT(lp),
1141 SMC_GET_RX_CFG(lp));
1142 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1143 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1144 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1145 SMC_GET_RX_STS_FIFO_PEEK(lp));
1146 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1147 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1148 }
1149 #endif
1150
1151 /* Handle PHY interrupt condition */
1152 if (status & INT_STS_PHY_INT_) {
1153 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1154 smc911x_phy_interrupt(dev);
1155 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1156 }
1157 } while (--timeout);
1158
1159 /* restore mask state */
1160 SMC_SET_INT_EN(lp, mask);
1161
1162 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1163 8-timeout);
1164
1165 spin_unlock_irqrestore(&lp->lock, flags);
1166
1167 return IRQ_HANDLED;
1168 }
1169
1170 #ifdef SMC_USE_DMA
1171 static void
smc911x_tx_dma_irq(void * data)1172 smc911x_tx_dma_irq(void *data)
1173 {
1174 struct smc911x_local *lp = data;
1175 struct net_device *dev = lp->netdev;
1176 struct sk_buff *skb = lp->current_tx_skb;
1177 unsigned long flags;
1178
1179 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1180
1181 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1182 BUG_ON(skb == NULL);
1183 dma_unmap_single(lp->dev, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1184 netif_trans_update(dev);
1185 dev_kfree_skb_irq(skb);
1186 lp->current_tx_skb = NULL;
1187 if (lp->pending_tx_skb != NULL)
1188 smc911x_hardware_send_pkt(dev);
1189 else {
1190 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1191 "No pending Tx packets. DMA disabled\n");
1192 spin_lock_irqsave(&lp->lock, flags);
1193 lp->txdma_active = 0;
1194 if (!lp->tx_throttle) {
1195 netif_wake_queue(dev);
1196 }
1197 spin_unlock_irqrestore(&lp->lock, flags);
1198 }
1199
1200 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1201 "TX DMA irq completed\n");
1202 }
1203 static void
smc911x_rx_dma_irq(void * data)1204 smc911x_rx_dma_irq(void *data)
1205 {
1206 struct smc911x_local *lp = data;
1207 struct net_device *dev = lp->netdev;
1208 struct sk_buff *skb = lp->current_rx_skb;
1209 unsigned long flags;
1210 unsigned int pkts;
1211
1212 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1213 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1214 dma_unmap_single(lp->dev, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1215 BUG_ON(skb == NULL);
1216 lp->current_rx_skb = NULL;
1217 PRINT_PKT(skb->data, skb->len);
1218 skb->protocol = eth_type_trans(skb, dev);
1219 dev->stats.rx_packets++;
1220 dev->stats.rx_bytes += skb->len;
1221 netif_rx(skb);
1222
1223 spin_lock_irqsave(&lp->lock, flags);
1224 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1225 if (pkts != 0) {
1226 smc911x_rcv(dev);
1227 }else {
1228 lp->rxdma_active = 0;
1229 }
1230 spin_unlock_irqrestore(&lp->lock, flags);
1231 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1232 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1233 pkts);
1234 }
1235 #endif /* SMC_USE_DMA */
1236
1237 #ifdef CONFIG_NET_POLL_CONTROLLER
1238 /*
1239 * Polling receive - used by netconsole and other diagnostic tools
1240 * to allow network i/o with interrupts disabled.
1241 */
smc911x_poll_controller(struct net_device * dev)1242 static void smc911x_poll_controller(struct net_device *dev)
1243 {
1244 disable_irq(dev->irq);
1245 smc911x_interrupt(dev->irq, dev);
1246 enable_irq(dev->irq);
1247 }
1248 #endif
1249
1250 /* Our watchdog timed out. Called by the networking layer */
smc911x_timeout(struct net_device * dev,unsigned int txqueue)1251 static void smc911x_timeout(struct net_device *dev, unsigned int txqueue)
1252 {
1253 struct smc911x_local *lp = netdev_priv(dev);
1254 int status, mask;
1255 unsigned long flags;
1256
1257 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1258
1259 spin_lock_irqsave(&lp->lock, flags);
1260 status = SMC_GET_INT(lp);
1261 mask = SMC_GET_INT_EN(lp);
1262 spin_unlock_irqrestore(&lp->lock, flags);
1263 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1264 status, mask);
1265
1266 /* Dump the current TX FIFO contents and restart */
1267 mask = SMC_GET_TX_CFG(lp);
1268 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1269 /*
1270 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1271 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1272 * which calls schedule(). Hence we use a work queue.
1273 */
1274 if (lp->phy_type != 0)
1275 schedule_work(&lp->phy_configure);
1276
1277 /* We can accept TX packets again */
1278 netif_trans_update(dev); /* prevent tx timeout */
1279 netif_wake_queue(dev);
1280 }
1281
1282 /*
1283 * This routine will, depending on the values passed to it,
1284 * either make it accept multicast packets, go into
1285 * promiscuous mode (for TCPDUMP and cousins) or accept
1286 * a select set of multicast packets
1287 */
smc911x_set_multicast_list(struct net_device * dev)1288 static void smc911x_set_multicast_list(struct net_device *dev)
1289 {
1290 struct smc911x_local *lp = netdev_priv(dev);
1291 unsigned int multicast_table[2];
1292 unsigned int mcr, update_multicast = 0;
1293 unsigned long flags;
1294
1295 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1296
1297 spin_lock_irqsave(&lp->lock, flags);
1298 SMC_GET_MAC_CR(lp, mcr);
1299 spin_unlock_irqrestore(&lp->lock, flags);
1300
1301 if (dev->flags & IFF_PROMISC) {
1302
1303 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1304 mcr |= MAC_CR_PRMS_;
1305 }
1306 /*
1307 * Here, I am setting this to accept all multicast packets.
1308 * I don't need to zero the multicast table, because the flag is
1309 * checked before the table is
1310 */
1311 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1312 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1313 mcr |= MAC_CR_MCPAS_;
1314 }
1315
1316 /*
1317 * This sets the internal hardware table to filter out unwanted
1318 * multicast packets before they take up memory.
1319 *
1320 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1321 * address are the offset into the table. If that bit is 1, then the
1322 * multicast packet is accepted. Otherwise, it's dropped silently.
1323 *
1324 * To use the 6 bits as an offset into the table, the high 1 bit is
1325 * the number of the 32 bit register, while the low 5 bits are the bit
1326 * within that register.
1327 */
1328 else if (!netdev_mc_empty(dev)) {
1329 struct netdev_hw_addr *ha;
1330
1331 /* Set the Hash perfec mode */
1332 mcr |= MAC_CR_HPFILT_;
1333
1334 /* start with a table of all zeros: reject all */
1335 memset(multicast_table, 0, sizeof(multicast_table));
1336
1337 netdev_for_each_mc_addr(ha, dev) {
1338 u32 position;
1339
1340 /* upper 6 bits are used as hash index */
1341 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1342
1343 multicast_table[position>>5] |= 1 << (position&0x1f);
1344 }
1345
1346 /* be sure I get rid of flags I might have set */
1347 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1348
1349 /* now, the table can be loaded into the chipset */
1350 update_multicast = 1;
1351 } else {
1352 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1353 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1354
1355 /*
1356 * since I'm disabling all multicast entirely, I need to
1357 * clear the multicast list
1358 */
1359 memset(multicast_table, 0, sizeof(multicast_table));
1360 update_multicast = 1;
1361 }
1362
1363 spin_lock_irqsave(&lp->lock, flags);
1364 SMC_SET_MAC_CR(lp, mcr);
1365 if (update_multicast) {
1366 DBG(SMC_DEBUG_MISC, dev,
1367 "update mcast hash table 0x%08x 0x%08x\n",
1368 multicast_table[0], multicast_table[1]);
1369 SMC_SET_HASHL(lp, multicast_table[0]);
1370 SMC_SET_HASHH(lp, multicast_table[1]);
1371 }
1372 spin_unlock_irqrestore(&lp->lock, flags);
1373 }
1374
1375
1376 /*
1377 * Open and Initialize the board
1378 *
1379 * Set up everything, reset the card, etc..
1380 */
1381 static int
smc911x_open(struct net_device * dev)1382 smc911x_open(struct net_device *dev)
1383 {
1384 struct smc911x_local *lp = netdev_priv(dev);
1385
1386 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1387
1388 /* reset the hardware */
1389 smc911x_reset(dev);
1390
1391 /* Configure the PHY, initialize the link state */
1392 smc911x_phy_configure(&lp->phy_configure);
1393
1394 /* Turn on Tx + Rx */
1395 smc911x_enable(dev);
1396
1397 netif_start_queue(dev);
1398
1399 return 0;
1400 }
1401
1402 /*
1403 * smc911x_close
1404 *
1405 * this makes the board clean up everything that it can
1406 * and not talk to the outside world. Caused by
1407 * an 'ifconfig ethX down'
1408 */
smc911x_close(struct net_device * dev)1409 static int smc911x_close(struct net_device *dev)
1410 {
1411 struct smc911x_local *lp = netdev_priv(dev);
1412
1413 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1414
1415 netif_stop_queue(dev);
1416 netif_carrier_off(dev);
1417
1418 /* clear everything */
1419 smc911x_shutdown(dev);
1420
1421 if (lp->phy_type != 0) {
1422 /* We need to ensure that no calls to
1423 * smc911x_phy_configure are pending.
1424 */
1425 cancel_work_sync(&lp->phy_configure);
1426 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1427 }
1428
1429 if (lp->pending_tx_skb) {
1430 dev_kfree_skb(lp->pending_tx_skb);
1431 lp->pending_tx_skb = NULL;
1432 }
1433
1434 return 0;
1435 }
1436
1437 /*
1438 * Ethtool support
1439 */
1440 static int
smc911x_ethtool_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)1441 smc911x_ethtool_get_link_ksettings(struct net_device *dev,
1442 struct ethtool_link_ksettings *cmd)
1443 {
1444 struct smc911x_local *lp = netdev_priv(dev);
1445 int status;
1446 unsigned long flags;
1447 u32 supported;
1448
1449 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1450
1451 if (lp->phy_type != 0) {
1452 spin_lock_irqsave(&lp->lock, flags);
1453 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1454 spin_unlock_irqrestore(&lp->lock, flags);
1455 } else {
1456 supported = SUPPORTED_10baseT_Half |
1457 SUPPORTED_10baseT_Full |
1458 SUPPORTED_TP | SUPPORTED_AUI;
1459
1460 if (lp->ctl_rspeed == 10)
1461 cmd->base.speed = SPEED_10;
1462 else if (lp->ctl_rspeed == 100)
1463 cmd->base.speed = SPEED_100;
1464
1465 cmd->base.autoneg = AUTONEG_DISABLE;
1466 cmd->base.port = 0;
1467 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1468 cmd->base.duplex =
1469 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1470 DUPLEX_FULL : DUPLEX_HALF;
1471
1472 ethtool_convert_legacy_u32_to_link_mode(
1473 cmd->link_modes.supported, supported);
1474
1475 }
1476
1477 return 0;
1478 }
1479
1480 static int
smc911x_ethtool_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)1481 smc911x_ethtool_set_link_ksettings(struct net_device *dev,
1482 const struct ethtool_link_ksettings *cmd)
1483 {
1484 struct smc911x_local *lp = netdev_priv(dev);
1485 int ret;
1486 unsigned long flags;
1487
1488 if (lp->phy_type != 0) {
1489 spin_lock_irqsave(&lp->lock, flags);
1490 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1491 spin_unlock_irqrestore(&lp->lock, flags);
1492 } else {
1493 if (cmd->base.autoneg != AUTONEG_DISABLE ||
1494 cmd->base.speed != SPEED_10 ||
1495 (cmd->base.duplex != DUPLEX_HALF &&
1496 cmd->base.duplex != DUPLEX_FULL) ||
1497 (cmd->base.port != PORT_TP &&
1498 cmd->base.port != PORT_AUI))
1499 return -EINVAL;
1500
1501 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1502
1503 ret = 0;
1504 }
1505
1506 return ret;
1507 }
1508
1509 static void
smc911x_ethtool_getdrvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1510 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1511 {
1512 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1513 strlcpy(info->version, version, sizeof(info->version));
1514 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1515 sizeof(info->bus_info));
1516 }
1517
smc911x_ethtool_nwayreset(struct net_device * dev)1518 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1519 {
1520 struct smc911x_local *lp = netdev_priv(dev);
1521 int ret = -EINVAL;
1522 unsigned long flags;
1523
1524 if (lp->phy_type != 0) {
1525 spin_lock_irqsave(&lp->lock, flags);
1526 ret = mii_nway_restart(&lp->mii);
1527 spin_unlock_irqrestore(&lp->lock, flags);
1528 }
1529
1530 return ret;
1531 }
1532
smc911x_ethtool_getmsglevel(struct net_device * dev)1533 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1534 {
1535 struct smc911x_local *lp = netdev_priv(dev);
1536 return lp->msg_enable;
1537 }
1538
smc911x_ethtool_setmsglevel(struct net_device * dev,u32 level)1539 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1540 {
1541 struct smc911x_local *lp = netdev_priv(dev);
1542 lp->msg_enable = level;
1543 }
1544
smc911x_ethtool_getregslen(struct net_device * dev)1545 static int smc911x_ethtool_getregslen(struct net_device *dev)
1546 {
1547 /* System regs + MAC regs + PHY regs */
1548 return (((E2P_CMD - ID_REV)/4 + 1) +
1549 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1550 }
1551
smc911x_ethtool_getregs(struct net_device * dev,struct ethtool_regs * regs,void * buf)1552 static void smc911x_ethtool_getregs(struct net_device *dev,
1553 struct ethtool_regs *regs, void *buf)
1554 {
1555 struct smc911x_local *lp = netdev_priv(dev);
1556 unsigned long flags;
1557 u32 reg,i,j=0;
1558 u32 *data = (u32*)buf;
1559
1560 regs->version = lp->version;
1561 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1562 data[j++] = SMC_inl(lp, i);
1563 }
1564 for(i=MAC_CR;i<=WUCSR;i++) {
1565 spin_lock_irqsave(&lp->lock, flags);
1566 SMC_GET_MAC_CSR(lp, i, reg);
1567 spin_unlock_irqrestore(&lp->lock, flags);
1568 data[j++] = reg;
1569 }
1570 for(i=0;i<=31;i++) {
1571 spin_lock_irqsave(&lp->lock, flags);
1572 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1573 spin_unlock_irqrestore(&lp->lock, flags);
1574 data[j++] = reg & 0xFFFF;
1575 }
1576 }
1577
smc911x_ethtool_wait_eeprom_ready(struct net_device * dev)1578 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1579 {
1580 struct smc911x_local *lp = netdev_priv(dev);
1581 unsigned int timeout;
1582 int e2p_cmd;
1583
1584 e2p_cmd = SMC_GET_E2P_CMD(lp);
1585 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1586 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1587 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1588 __func__);
1589 return -EFAULT;
1590 }
1591 mdelay(1);
1592 e2p_cmd = SMC_GET_E2P_CMD(lp);
1593 }
1594 if (timeout == 0) {
1595 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1596 __func__);
1597 return -ETIMEDOUT;
1598 }
1599 return 0;
1600 }
1601
smc911x_ethtool_write_eeprom_cmd(struct net_device * dev,int cmd,int addr)1602 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1603 int cmd, int addr)
1604 {
1605 struct smc911x_local *lp = netdev_priv(dev);
1606 int ret;
1607
1608 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1609 return ret;
1610 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1611 ((cmd) & (0x7<<28)) |
1612 ((addr) & 0xFF));
1613 return 0;
1614 }
1615
smc911x_ethtool_read_eeprom_byte(struct net_device * dev,u8 * data)1616 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1617 u8 *data)
1618 {
1619 struct smc911x_local *lp = netdev_priv(dev);
1620 int ret;
1621
1622 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1623 return ret;
1624 *data = SMC_GET_E2P_DATA(lp);
1625 return 0;
1626 }
1627
smc911x_ethtool_write_eeprom_byte(struct net_device * dev,u8 data)1628 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1629 u8 data)
1630 {
1631 struct smc911x_local *lp = netdev_priv(dev);
1632 int ret;
1633
1634 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1635 return ret;
1636 SMC_SET_E2P_DATA(lp, data);
1637 return 0;
1638 }
1639
smc911x_ethtool_geteeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)1640 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1641 struct ethtool_eeprom *eeprom, u8 *data)
1642 {
1643 u8 eebuf[SMC911X_EEPROM_LEN];
1644 int i, ret;
1645
1646 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1647 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1648 return ret;
1649 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1650 return ret;
1651 }
1652 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1653 return 0;
1654 }
1655
smc911x_ethtool_seteeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)1656 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1657 struct ethtool_eeprom *eeprom, u8 *data)
1658 {
1659 int i, ret;
1660
1661 /* Enable erase */
1662 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1663 return ret;
1664 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1665 /* erase byte */
1666 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1667 return ret;
1668 /* write byte */
1669 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1670 return ret;
1671 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1672 return ret;
1673 }
1674 return 0;
1675 }
1676
smc911x_ethtool_geteeprom_len(struct net_device * dev)1677 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1678 {
1679 return SMC911X_EEPROM_LEN;
1680 }
1681
1682 static const struct ethtool_ops smc911x_ethtool_ops = {
1683 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1684 .get_msglevel = smc911x_ethtool_getmsglevel,
1685 .set_msglevel = smc911x_ethtool_setmsglevel,
1686 .nway_reset = smc911x_ethtool_nwayreset,
1687 .get_link = ethtool_op_get_link,
1688 .get_regs_len = smc911x_ethtool_getregslen,
1689 .get_regs = smc911x_ethtool_getregs,
1690 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1691 .get_eeprom = smc911x_ethtool_geteeprom,
1692 .set_eeprom = smc911x_ethtool_seteeprom,
1693 .get_link_ksettings = smc911x_ethtool_get_link_ksettings,
1694 .set_link_ksettings = smc911x_ethtool_set_link_ksettings,
1695 };
1696
1697 /*
1698 * smc911x_findirq
1699 *
1700 * This routine has a simple purpose -- make the SMC chip generate an
1701 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1702 */
smc911x_findirq(struct net_device * dev)1703 static int smc911x_findirq(struct net_device *dev)
1704 {
1705 struct smc911x_local *lp = netdev_priv(dev);
1706 int timeout = 20;
1707 unsigned long cookie;
1708
1709 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1710
1711 cookie = probe_irq_on();
1712
1713 /*
1714 * Force a SW interrupt
1715 */
1716
1717 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1718
1719 /*
1720 * Wait until positive that the interrupt has been generated
1721 */
1722 do {
1723 int int_status;
1724 udelay(10);
1725 int_status = SMC_GET_INT_EN(lp);
1726 if (int_status & INT_EN_SW_INT_EN_)
1727 break; /* got the interrupt */
1728 } while (--timeout);
1729
1730 /*
1731 * there is really nothing that I can do here if timeout fails,
1732 * as autoirq_report will return a 0 anyway, which is what I
1733 * want in this case. Plus, the clean up is needed in both
1734 * cases.
1735 */
1736
1737 /* and disable all interrupts again */
1738 SMC_SET_INT_EN(lp, 0);
1739
1740 /* and return what I found */
1741 return probe_irq_off(cookie);
1742 }
1743
1744 static const struct net_device_ops smc911x_netdev_ops = {
1745 .ndo_open = smc911x_open,
1746 .ndo_stop = smc911x_close,
1747 .ndo_start_xmit = smc911x_hard_start_xmit,
1748 .ndo_tx_timeout = smc911x_timeout,
1749 .ndo_set_rx_mode = smc911x_set_multicast_list,
1750 .ndo_validate_addr = eth_validate_addr,
1751 .ndo_set_mac_address = eth_mac_addr,
1752 #ifdef CONFIG_NET_POLL_CONTROLLER
1753 .ndo_poll_controller = smc911x_poll_controller,
1754 #endif
1755 };
1756
1757 /*
1758 * Function: smc911x_probe(unsigned long ioaddr)
1759 *
1760 * Purpose:
1761 * Tests to see if a given ioaddr points to an SMC911x chip.
1762 * Returns a 0 on success
1763 *
1764 * Algorithm:
1765 * (1) see if the endian word is OK
1766 * (1) see if I recognize the chip ID in the appropriate register
1767 *
1768 * Here I do typical initialization tasks.
1769 *
1770 * o Initialize the structure if needed
1771 * o print out my vanity message if not done so already
1772 * o print out what type of hardware is detected
1773 * o print out the ethernet address
1774 * o find the IRQ
1775 * o set up my private data
1776 * o configure the dev structure with my subroutines
1777 * o actually GRAB the irq.
1778 * o GRAB the region
1779 */
smc911x_probe(struct net_device * dev)1780 static int smc911x_probe(struct net_device *dev)
1781 {
1782 struct smc911x_local *lp = netdev_priv(dev);
1783 int i, retval;
1784 unsigned int val, chip_id, revision;
1785 const char *version_string;
1786 unsigned long irq_flags;
1787 #ifdef SMC_USE_DMA
1788 struct dma_slave_config config;
1789 dma_cap_mask_t mask;
1790 #endif
1791
1792 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1793
1794 /* First, see if the endian word is recognized */
1795 val = SMC_GET_BYTE_TEST(lp);
1796 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1797 CARDNAME, val);
1798 if (val != 0x87654321) {
1799 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1800 retval = -ENODEV;
1801 goto err_out;
1802 }
1803
1804 /*
1805 * check if the revision register is something that I
1806 * recognize. These might need to be added to later,
1807 * as future revisions could be added.
1808 */
1809 chip_id = SMC_GET_PN(lp);
1810 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1811 CARDNAME, chip_id);
1812 for(i=0;chip_ids[i].id != 0; i++) {
1813 if (chip_ids[i].id == chip_id) break;
1814 }
1815 if (!chip_ids[i].id) {
1816 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1817 retval = -ENODEV;
1818 goto err_out;
1819 }
1820 version_string = chip_ids[i].name;
1821
1822 revision = SMC_GET_REV(lp);
1823 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1824
1825 /* At this point I'll assume that the chip is an SMC911x. */
1826 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1827 CARDNAME, chip_ids[i].name);
1828
1829 /* Validate the TX FIFO size requested */
1830 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1831 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1832 tx_fifo_kb);
1833 retval = -EINVAL;
1834 goto err_out;
1835 }
1836
1837 /* fill in some of the fields */
1838 lp->version = chip_ids[i].id;
1839 lp->revision = revision;
1840 lp->tx_fifo_kb = tx_fifo_kb;
1841 /* Reverse calculate the RX FIFO size from the TX */
1842 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1843 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1844
1845 /* Set the automatic flow control values */
1846 switch(lp->tx_fifo_kb) {
1847 /*
1848 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1849 * AFC_LO is AFC_HI/2
1850 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1851 */
1852 case 2:/* 13440 Rx Data Fifo Size */
1853 lp->afc_cfg=0x008C46AF;break;
1854 case 3:/* 12480 Rx Data Fifo Size */
1855 lp->afc_cfg=0x0082419F;break;
1856 case 4:/* 11520 Rx Data Fifo Size */
1857 lp->afc_cfg=0x00783C9F;break;
1858 case 5:/* 10560 Rx Data Fifo Size */
1859 lp->afc_cfg=0x006E374F;break;
1860 case 6:/* 9600 Rx Data Fifo Size */
1861 lp->afc_cfg=0x0064328F;break;
1862 case 7:/* 8640 Rx Data Fifo Size */
1863 lp->afc_cfg=0x005A2D7F;break;
1864 case 8:/* 7680 Rx Data Fifo Size */
1865 lp->afc_cfg=0x0050287F;break;
1866 case 9:/* 6720 Rx Data Fifo Size */
1867 lp->afc_cfg=0x0046236F;break;
1868 case 10:/* 5760 Rx Data Fifo Size */
1869 lp->afc_cfg=0x003C1E6F;break;
1870 case 11:/* 4800 Rx Data Fifo Size */
1871 lp->afc_cfg=0x0032195F;break;
1872 /*
1873 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1874 * AFC_LO is AFC_HI/2
1875 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1876 */
1877 case 12:/* 3840 Rx Data Fifo Size */
1878 lp->afc_cfg=0x0024124F;break;
1879 case 13:/* 2880 Rx Data Fifo Size */
1880 lp->afc_cfg=0x0015073F;break;
1881 case 14:/* 1920 Rx Data Fifo Size */
1882 lp->afc_cfg=0x0006032F;break;
1883 default:
1884 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1885 break;
1886 }
1887
1888 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1889 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1890 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1891
1892 spin_lock_init(&lp->lock);
1893
1894 /* Get the MAC address */
1895 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1896
1897 /* now, reset the chip, and put it into a known state */
1898 smc911x_reset(dev);
1899
1900 /*
1901 * If dev->irq is 0, then the device has to be banged on to see
1902 * what the IRQ is.
1903 *
1904 * Specifying an IRQ is done with the assumption that the user knows
1905 * what (s)he is doing. No checking is done!!!!
1906 */
1907 if (dev->irq < 1) {
1908 int trials;
1909
1910 trials = 3;
1911 while (trials--) {
1912 dev->irq = smc911x_findirq(dev);
1913 if (dev->irq)
1914 break;
1915 /* kick the card and try again */
1916 smc911x_reset(dev);
1917 }
1918 }
1919 if (dev->irq == 0) {
1920 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1921 retval = -ENODEV;
1922 goto err_out;
1923 }
1924 dev->irq = irq_canonicalize(dev->irq);
1925
1926 dev->netdev_ops = &smc911x_netdev_ops;
1927 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1928 dev->ethtool_ops = &smc911x_ethtool_ops;
1929
1930 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1931 lp->mii.phy_id_mask = 0x1f;
1932 lp->mii.reg_num_mask = 0x1f;
1933 lp->mii.force_media = 0;
1934 lp->mii.full_duplex = 0;
1935 lp->mii.dev = dev;
1936 lp->mii.mdio_read = smc911x_phy_read;
1937 lp->mii.mdio_write = smc911x_phy_write;
1938
1939 /*
1940 * Locate the phy, if any.
1941 */
1942 smc911x_phy_detect(dev);
1943
1944 /* Set default parameters */
1945 lp->msg_enable = NETIF_MSG_LINK;
1946 lp->ctl_rfduplx = 1;
1947 lp->ctl_rspeed = 100;
1948
1949 #ifdef SMC_DYNAMIC_BUS_CONFIG
1950 irq_flags = lp->cfg.irq_flags;
1951 #else
1952 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1953 #endif
1954
1955 /* Grab the IRQ */
1956 retval = request_irq(dev->irq, smc911x_interrupt,
1957 irq_flags, dev->name, dev);
1958 if (retval)
1959 goto err_out;
1960
1961 #ifdef SMC_USE_DMA
1962
1963 dma_cap_zero(mask);
1964 dma_cap_set(DMA_SLAVE, mask);
1965 lp->rxdma = dma_request_channel(mask, NULL, NULL);
1966 lp->txdma = dma_request_channel(mask, NULL, NULL);
1967 lp->rxdma_active = 0;
1968 lp->txdma_active = 0;
1969
1970 memset(&config, 0, sizeof(config));
1971 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1972 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1973 config.src_addr = lp->physaddr + RX_DATA_FIFO;
1974 config.dst_addr = lp->physaddr + TX_DATA_FIFO;
1975 config.src_maxburst = 32;
1976 config.dst_maxburst = 32;
1977 retval = dmaengine_slave_config(lp->rxdma, &config);
1978 if (retval) {
1979 dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
1980 retval);
1981 goto err_out;
1982 }
1983 retval = dmaengine_slave_config(lp->txdma, &config);
1984 if (retval) {
1985 dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
1986 retval);
1987 goto err_out;
1988 }
1989 #endif
1990
1991 retval = register_netdev(dev);
1992 if (retval == 0) {
1993 /* now, print out the card info, in a short format.. */
1994 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
1995 version_string, lp->revision,
1996 dev->base_addr, dev->irq);
1997
1998 #ifdef SMC_USE_DMA
1999 if (lp->rxdma)
2000 pr_cont(" RXDMA %p", lp->rxdma);
2001
2002 if (lp->txdma)
2003 pr_cont(" TXDMA %p", lp->txdma);
2004 #endif
2005 pr_cont("\n");
2006 if (!is_valid_ether_addr(dev->dev_addr)) {
2007 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2008 } else {
2009 /* Print the Ethernet address */
2010 netdev_info(dev, "Ethernet addr: %pM\n",
2011 dev->dev_addr);
2012 }
2013
2014 if (lp->phy_type == 0) {
2015 PRINTK(dev, "No PHY found\n");
2016 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2017 PRINTK(dev, "LAN911x Internal PHY\n");
2018 } else {
2019 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2020 }
2021 }
2022
2023 err_out:
2024 #ifdef SMC_USE_DMA
2025 if (retval) {
2026 if (lp->rxdma)
2027 dma_release_channel(lp->rxdma);
2028 if (lp->txdma)
2029 dma_release_channel(lp->txdma);
2030 }
2031 #endif
2032 return retval;
2033 }
2034
2035 /*
2036 * smc911x_drv_probe(void)
2037 *
2038 * Output:
2039 * 0 --> there is a device
2040 * anything else, error
2041 */
smc911x_drv_probe(struct platform_device * pdev)2042 static int smc911x_drv_probe(struct platform_device *pdev)
2043 {
2044 struct net_device *ndev;
2045 struct resource *res;
2046 struct smc911x_local *lp;
2047 void __iomem *addr;
2048 int ret;
2049
2050 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2051 if (!res) {
2052 ret = -ENODEV;
2053 goto out;
2054 }
2055
2056 /*
2057 * Request the regions.
2058 */
2059 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2060 ret = -EBUSY;
2061 goto out;
2062 }
2063
2064 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2065 if (!ndev) {
2066 ret = -ENOMEM;
2067 goto release_1;
2068 }
2069 SET_NETDEV_DEV(ndev, &pdev->dev);
2070
2071 ndev->dma = (unsigned char)-1;
2072 ndev->irq = platform_get_irq(pdev, 0);
2073 lp = netdev_priv(ndev);
2074 lp->netdev = ndev;
2075 #ifdef SMC_DYNAMIC_BUS_CONFIG
2076 {
2077 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2078 if (!pd) {
2079 ret = -EINVAL;
2080 goto release_both;
2081 }
2082 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2083 }
2084 #endif
2085
2086 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2087 if (!addr) {
2088 ret = -ENOMEM;
2089 goto release_both;
2090 }
2091
2092 platform_set_drvdata(pdev, ndev);
2093 lp->base = addr;
2094 ndev->base_addr = res->start;
2095 ret = smc911x_probe(ndev);
2096 if (ret != 0) {
2097 iounmap(addr);
2098 release_both:
2099 free_netdev(ndev);
2100 release_1:
2101 release_mem_region(res->start, SMC911X_IO_EXTENT);
2102 out:
2103 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2104 }
2105 #ifdef SMC_USE_DMA
2106 else {
2107 lp->physaddr = res->start;
2108 lp->dev = &pdev->dev;
2109 }
2110 #endif
2111
2112 return ret;
2113 }
2114
smc911x_drv_remove(struct platform_device * pdev)2115 static int smc911x_drv_remove(struct platform_device *pdev)
2116 {
2117 struct net_device *ndev = platform_get_drvdata(pdev);
2118 struct smc911x_local *lp = netdev_priv(ndev);
2119 struct resource *res;
2120
2121 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2122
2123 unregister_netdev(ndev);
2124
2125 free_irq(ndev->irq, ndev);
2126
2127 #ifdef SMC_USE_DMA
2128 {
2129 if (lp->rxdma)
2130 dma_release_channel(lp->rxdma);
2131 if (lp->txdma)
2132 dma_release_channel(lp->txdma);
2133 }
2134 #endif
2135 iounmap(lp->base);
2136 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2137 release_mem_region(res->start, SMC911X_IO_EXTENT);
2138
2139 free_netdev(ndev);
2140 return 0;
2141 }
2142
smc911x_drv_suspend(struct platform_device * dev,pm_message_t state)2143 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2144 {
2145 struct net_device *ndev = platform_get_drvdata(dev);
2146 struct smc911x_local *lp = netdev_priv(ndev);
2147
2148 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2149 if (ndev) {
2150 if (netif_running(ndev)) {
2151 netif_device_detach(ndev);
2152 smc911x_shutdown(ndev);
2153 #if POWER_DOWN
2154 /* Set D2 - Energy detect only setting */
2155 SMC_SET_PMT_CTRL(lp, 2<<12);
2156 #endif
2157 }
2158 }
2159 return 0;
2160 }
2161
smc911x_drv_resume(struct platform_device * dev)2162 static int smc911x_drv_resume(struct platform_device *dev)
2163 {
2164 struct net_device *ndev = platform_get_drvdata(dev);
2165
2166 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2167 if (ndev) {
2168 struct smc911x_local *lp = netdev_priv(ndev);
2169
2170 if (netif_running(ndev)) {
2171 smc911x_reset(ndev);
2172 if (lp->phy_type != 0)
2173 smc911x_phy_configure(&lp->phy_configure);
2174 smc911x_enable(ndev);
2175 netif_device_attach(ndev);
2176 }
2177 }
2178 return 0;
2179 }
2180
2181 static struct platform_driver smc911x_driver = {
2182 .probe = smc911x_drv_probe,
2183 .remove = smc911x_drv_remove,
2184 .suspend = smc911x_drv_suspend,
2185 .resume = smc911x_drv_resume,
2186 .driver = {
2187 .name = CARDNAME,
2188 },
2189 };
2190
2191 module_platform_driver(smc911x_driver);
2192
