1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
3
4 #include <linux/module.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/crc32.h>
9 #include <linux/microchipphy.h>
10 #include <linux/net_tstamp.h>
11 #include <linux/of_mdio.h>
12 #include <linux/of_net.h>
13 #include <linux/phy.h>
14 #include <linux/phy_fixed.h>
15 #include <linux/rtnetlink.h>
16 #include <linux/iopoll.h>
17 #include <linux/crc16.h>
18 #include "lan743x_main.h"
19 #include "lan743x_ethtool.h"
20
21 #define MMD_ACCESS_ADDRESS 0
22 #define MMD_ACCESS_WRITE 1
23 #define MMD_ACCESS_READ 2
24 #define MMD_ACCESS_READ_INC 3
25 #define PCS_POWER_STATE_DOWN 0x6
26 #define PCS_POWER_STATE_UP 0x4
27
pci11x1x_strap_get_status(struct lan743x_adapter * adapter)28 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
29 {
30 u32 chip_rev;
31 u32 cfg_load;
32 u32 hw_cfg;
33 u32 strap;
34 int ret;
35
36 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */
37 ret = lan743x_hs_syslock_acquire(adapter, 100);
38 if (ret < 0) {
39 netif_err(adapter, drv, adapter->netdev,
40 "Sys Lock acquire failed ret:%d\n", ret);
41 return;
42 }
43
44 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
45 lan743x_hs_syslock_release(adapter);
46 hw_cfg = lan743x_csr_read(adapter, HW_CFG);
47
48 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
49 hw_cfg & HW_CFG_RST_PROTECT_) {
50 strap = lan743x_csr_read(adapter, STRAP_READ);
51 if (strap & STRAP_READ_SGMII_EN_)
52 adapter->is_sgmii_en = true;
53 else
54 adapter->is_sgmii_en = false;
55 } else {
56 chip_rev = lan743x_csr_read(adapter, FPGA_REV);
57 if (chip_rev) {
58 if (chip_rev & FPGA_SGMII_OP)
59 adapter->is_sgmii_en = true;
60 else
61 adapter->is_sgmii_en = false;
62 } else {
63 adapter->is_sgmii_en = false;
64 }
65 }
66 netif_dbg(adapter, drv, adapter->netdev,
67 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis");
68 }
69
is_pci11x1x_chip(struct lan743x_adapter * adapter)70 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter)
71 {
72 struct lan743x_csr *csr = &adapter->csr;
73 u32 id_rev = csr->id_rev;
74
75 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) ||
76 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) {
77 return true;
78 }
79 return false;
80 }
81
lan743x_pci_cleanup(struct lan743x_adapter * adapter)82 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
83 {
84 pci_release_selected_regions(adapter->pdev,
85 pci_select_bars(adapter->pdev,
86 IORESOURCE_MEM));
87 pci_disable_device(adapter->pdev);
88 }
89
lan743x_pci_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)90 static int lan743x_pci_init(struct lan743x_adapter *adapter,
91 struct pci_dev *pdev)
92 {
93 unsigned long bars = 0;
94 int ret;
95
96 adapter->pdev = pdev;
97 ret = pci_enable_device_mem(pdev);
98 if (ret)
99 goto return_error;
100
101 netif_info(adapter, probe, adapter->netdev,
102 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
103 pdev->vendor, pdev->device);
104 bars = pci_select_bars(pdev, IORESOURCE_MEM);
105 if (!test_bit(0, &bars))
106 goto disable_device;
107
108 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
109 if (ret)
110 goto disable_device;
111
112 pci_set_master(pdev);
113 return 0;
114
115 disable_device:
116 pci_disable_device(adapter->pdev);
117
118 return_error:
119 return ret;
120 }
121
lan743x_csr_read(struct lan743x_adapter * adapter,int offset)122 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
123 {
124 return ioread32(&adapter->csr.csr_address[offset]);
125 }
126
lan743x_csr_write(struct lan743x_adapter * adapter,int offset,u32 data)127 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
128 u32 data)
129 {
130 iowrite32(data, &adapter->csr.csr_address[offset]);
131 }
132
133 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
134
lan743x_csr_light_reset(struct lan743x_adapter * adapter)135 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
136 {
137 u32 data;
138
139 data = lan743x_csr_read(adapter, HW_CFG);
140 data |= HW_CFG_LRST_;
141 lan743x_csr_write(adapter, HW_CFG, data);
142
143 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
144 !(data & HW_CFG_LRST_), 100000, 10000000);
145 }
146
lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int udelay_min,int udelay_max,int count)147 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter,
148 int offset, u32 bit_mask,
149 int target_value, int udelay_min,
150 int udelay_max, int count)
151 {
152 u32 data;
153
154 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data,
155 target_value == !!(data & bit_mask),
156 udelay_max, udelay_min * count);
157 }
158
lan743x_csr_wait_for_bit(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int usleep_min,int usleep_max,int count)159 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
160 int offset, u32 bit_mask,
161 int target_value, int usleep_min,
162 int usleep_max, int count)
163 {
164 u32 data;
165
166 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
167 target_value == !!(data & bit_mask),
168 usleep_max, usleep_min * count);
169 }
170
lan743x_csr_init(struct lan743x_adapter * adapter)171 static int lan743x_csr_init(struct lan743x_adapter *adapter)
172 {
173 struct lan743x_csr *csr = &adapter->csr;
174 resource_size_t bar_start, bar_length;
175
176 bar_start = pci_resource_start(adapter->pdev, 0);
177 bar_length = pci_resource_len(adapter->pdev, 0);
178 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
179 bar_start, bar_length);
180 if (!csr->csr_address)
181 return -ENOMEM;
182
183 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
184 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
185 netif_info(adapter, probe, adapter->netdev,
186 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
187 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
188 FPGA_REV_GET_MINOR_(csr->fpga_rev));
189 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev))
190 return -ENODEV;
191
192 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
193 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
194 case ID_REV_CHIP_REV_A0_:
195 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
196 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
197 break;
198 case ID_REV_CHIP_REV_B0_:
199 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
200 break;
201 }
202
203 return lan743x_csr_light_reset(adapter);
204 }
205
lan743x_intr_software_isr(struct lan743x_adapter * adapter)206 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter)
207 {
208 struct lan743x_intr *intr = &adapter->intr;
209
210 /* disable the interrupt to prevent repeated re-triggering */
211 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
212 intr->software_isr_flag = true;
213 wake_up(&intr->software_isr_wq);
214 }
215
lan743x_tx_isr(void * context,u32 int_sts,u32 flags)216 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
217 {
218 struct lan743x_tx *tx = context;
219 struct lan743x_adapter *adapter = tx->adapter;
220 bool enable_flag = true;
221
222 lan743x_csr_read(adapter, INT_EN_SET);
223 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
224 lan743x_csr_write(adapter, INT_EN_CLR,
225 INT_BIT_DMA_TX_(tx->channel_number));
226 }
227
228 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
229 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
230 u32 dmac_int_sts;
231 u32 dmac_int_en;
232
233 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
234 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
235 else
236 dmac_int_sts = ioc_bit;
237 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
238 dmac_int_en = lan743x_csr_read(adapter,
239 DMAC_INT_EN_SET);
240 else
241 dmac_int_en = ioc_bit;
242
243 dmac_int_en &= ioc_bit;
244 dmac_int_sts &= dmac_int_en;
245 if (dmac_int_sts & ioc_bit) {
246 napi_schedule(&tx->napi);
247 enable_flag = false;/* poll func will enable later */
248 }
249 }
250
251 if (enable_flag)
252 /* enable isr */
253 lan743x_csr_write(adapter, INT_EN_SET,
254 INT_BIT_DMA_TX_(tx->channel_number));
255 }
256
lan743x_rx_isr(void * context,u32 int_sts,u32 flags)257 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
258 {
259 struct lan743x_rx *rx = context;
260 struct lan743x_adapter *adapter = rx->adapter;
261 bool enable_flag = true;
262
263 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
264 lan743x_csr_write(adapter, INT_EN_CLR,
265 INT_BIT_DMA_RX_(rx->channel_number));
266 }
267
268 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
269 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
270 u32 dmac_int_sts;
271 u32 dmac_int_en;
272
273 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
274 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
275 else
276 dmac_int_sts = rx_frame_bit;
277 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
278 dmac_int_en = lan743x_csr_read(adapter,
279 DMAC_INT_EN_SET);
280 else
281 dmac_int_en = rx_frame_bit;
282
283 dmac_int_en &= rx_frame_bit;
284 dmac_int_sts &= dmac_int_en;
285 if (dmac_int_sts & rx_frame_bit) {
286 napi_schedule(&rx->napi);
287 enable_flag = false;/* poll funct will enable later */
288 }
289 }
290
291 if (enable_flag) {
292 /* enable isr */
293 lan743x_csr_write(adapter, INT_EN_SET,
294 INT_BIT_DMA_RX_(rx->channel_number));
295 }
296 }
297
lan743x_intr_shared_isr(void * context,u32 int_sts,u32 flags)298 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
299 {
300 struct lan743x_adapter *adapter = context;
301 unsigned int channel;
302
303 if (int_sts & INT_BIT_ALL_RX_) {
304 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
305 channel++) {
306 u32 int_bit = INT_BIT_DMA_RX_(channel);
307
308 if (int_sts & int_bit) {
309 lan743x_rx_isr(&adapter->rx[channel],
310 int_bit, flags);
311 int_sts &= ~int_bit;
312 }
313 }
314 }
315 if (int_sts & INT_BIT_ALL_TX_) {
316 for (channel = 0; channel < adapter->used_tx_channels;
317 channel++) {
318 u32 int_bit = INT_BIT_DMA_TX_(channel);
319
320 if (int_sts & int_bit) {
321 lan743x_tx_isr(&adapter->tx[channel],
322 int_bit, flags);
323 int_sts &= ~int_bit;
324 }
325 }
326 }
327 if (int_sts & INT_BIT_ALL_OTHER_) {
328 if (int_sts & INT_BIT_SW_GP_) {
329 lan743x_intr_software_isr(adapter);
330 int_sts &= ~INT_BIT_SW_GP_;
331 }
332 if (int_sts & INT_BIT_1588_) {
333 lan743x_ptp_isr(adapter);
334 int_sts &= ~INT_BIT_1588_;
335 }
336 }
337 if (int_sts)
338 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
339 }
340
lan743x_intr_entry_isr(int irq,void * ptr)341 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
342 {
343 struct lan743x_vector *vector = ptr;
344 struct lan743x_adapter *adapter = vector->adapter;
345 irqreturn_t result = IRQ_NONE;
346 u32 int_enables;
347 u32 int_sts;
348
349 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
350 int_sts = lan743x_csr_read(adapter, INT_STS);
351 } else if (vector->flags &
352 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
353 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
354 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
355 } else {
356 /* use mask as implied status */
357 int_sts = vector->int_mask | INT_BIT_MAS_;
358 }
359
360 if (!(int_sts & INT_BIT_MAS_))
361 goto irq_done;
362
363 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
364 /* disable vector interrupt */
365 lan743x_csr_write(adapter,
366 INT_VEC_EN_CLR,
367 INT_VEC_EN_(vector->vector_index));
368
369 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
370 /* disable master interrupt */
371 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
372
373 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
374 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
375 } else {
376 /* use vector mask as implied enable mask */
377 int_enables = vector->int_mask;
378 }
379
380 int_sts &= int_enables;
381 int_sts &= vector->int_mask;
382 if (int_sts) {
383 if (vector->handler) {
384 vector->handler(vector->context,
385 int_sts, vector->flags);
386 } else {
387 /* disable interrupts on this vector */
388 lan743x_csr_write(adapter, INT_EN_CLR,
389 vector->int_mask);
390 }
391 result = IRQ_HANDLED;
392 }
393
394 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
395 /* enable master interrupt */
396 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
397
398 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
399 /* enable vector interrupt */
400 lan743x_csr_write(adapter,
401 INT_VEC_EN_SET,
402 INT_VEC_EN_(vector->vector_index));
403 irq_done:
404 return result;
405 }
406
lan743x_intr_test_isr(struct lan743x_adapter * adapter)407 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
408 {
409 struct lan743x_intr *intr = &adapter->intr;
410 int ret;
411
412 intr->software_isr_flag = false;
413
414 /* enable and activate test interrupt */
415 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
416 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
417
418 ret = wait_event_timeout(intr->software_isr_wq,
419 intr->software_isr_flag,
420 msecs_to_jiffies(200));
421
422 /* disable test interrupt */
423 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
424
425 return ret > 0 ? 0 : -ENODEV;
426 }
427
lan743x_intr_register_isr(struct lan743x_adapter * adapter,int vector_index,u32 flags,u32 int_mask,lan743x_vector_handler handler,void * context)428 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
429 int vector_index, u32 flags,
430 u32 int_mask,
431 lan743x_vector_handler handler,
432 void *context)
433 {
434 struct lan743x_vector *vector = &adapter->intr.vector_list
435 [vector_index];
436 int ret;
437
438 vector->adapter = adapter;
439 vector->flags = flags;
440 vector->vector_index = vector_index;
441 vector->int_mask = int_mask;
442 vector->handler = handler;
443 vector->context = context;
444
445 ret = request_irq(vector->irq,
446 lan743x_intr_entry_isr,
447 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
448 IRQF_SHARED : 0, DRIVER_NAME, vector);
449 if (ret) {
450 vector->handler = NULL;
451 vector->context = NULL;
452 vector->int_mask = 0;
453 vector->flags = 0;
454 }
455 return ret;
456 }
457
lan743x_intr_unregister_isr(struct lan743x_adapter * adapter,int vector_index)458 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
459 int vector_index)
460 {
461 struct lan743x_vector *vector = &adapter->intr.vector_list
462 [vector_index];
463
464 free_irq(vector->irq, vector);
465 vector->handler = NULL;
466 vector->context = NULL;
467 vector->int_mask = 0;
468 vector->flags = 0;
469 }
470
lan743x_intr_get_vector_flags(struct lan743x_adapter * adapter,u32 int_mask)471 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
472 u32 int_mask)
473 {
474 int index;
475
476 for (index = 0; index < adapter->max_vector_count; index++) {
477 if (adapter->intr.vector_list[index].int_mask & int_mask)
478 return adapter->intr.vector_list[index].flags;
479 }
480 return 0;
481 }
482
lan743x_intr_close(struct lan743x_adapter * adapter)483 static void lan743x_intr_close(struct lan743x_adapter *adapter)
484 {
485 struct lan743x_intr *intr = &adapter->intr;
486 int index = 0;
487
488 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
489 if (adapter->is_pci11x1x)
490 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF);
491 else
492 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
493
494 for (index = 0; index < intr->number_of_vectors; index++) {
495 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
496 lan743x_intr_unregister_isr(adapter, index);
497 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
498 }
499 }
500
501 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
502 pci_disable_msi(adapter->pdev);
503 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
504 }
505
506 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
507 pci_disable_msix(adapter->pdev);
508 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
509 }
510 }
511
lan743x_intr_open(struct lan743x_adapter * adapter)512 static int lan743x_intr_open(struct lan743x_adapter *adapter)
513 {
514 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT];
515 struct lan743x_intr *intr = &adapter->intr;
516 unsigned int used_tx_channels;
517 u32 int_vec_en_auto_clr = 0;
518 u8 max_vector_count;
519 u32 int_vec_map0 = 0;
520 u32 int_vec_map1 = 0;
521 int ret = -ENODEV;
522 int index = 0;
523 u32 flags = 0;
524
525 intr->number_of_vectors = 0;
526
527 /* Try to set up MSIX interrupts */
528 max_vector_count = adapter->max_vector_count;
529 memset(&msix_entries[0], 0,
530 sizeof(struct msix_entry) * max_vector_count);
531 for (index = 0; index < max_vector_count; index++)
532 msix_entries[index].entry = index;
533 used_tx_channels = adapter->used_tx_channels;
534 ret = pci_enable_msix_range(adapter->pdev,
535 msix_entries, 1,
536 1 + used_tx_channels +
537 LAN743X_USED_RX_CHANNELS);
538
539 if (ret > 0) {
540 intr->flags |= INTR_FLAG_MSIX_ENABLED;
541 intr->number_of_vectors = ret;
542 intr->using_vectors = true;
543 for (index = 0; index < intr->number_of_vectors; index++)
544 intr->vector_list[index].irq = msix_entries
545 [index].vector;
546 netif_info(adapter, ifup, adapter->netdev,
547 "using MSIX interrupts, number of vectors = %d\n",
548 intr->number_of_vectors);
549 }
550
551 /* If MSIX failed try to setup using MSI interrupts */
552 if (!intr->number_of_vectors) {
553 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
554 if (!pci_enable_msi(adapter->pdev)) {
555 intr->flags |= INTR_FLAG_MSI_ENABLED;
556 intr->number_of_vectors = 1;
557 intr->using_vectors = true;
558 intr->vector_list[0].irq =
559 adapter->pdev->irq;
560 netif_info(adapter, ifup, adapter->netdev,
561 "using MSI interrupts, number of vectors = %d\n",
562 intr->number_of_vectors);
563 }
564 }
565 }
566
567 /* If MSIX, and MSI failed, setup using legacy interrupt */
568 if (!intr->number_of_vectors) {
569 intr->number_of_vectors = 1;
570 intr->using_vectors = false;
571 intr->vector_list[0].irq = intr->irq;
572 netif_info(adapter, ifup, adapter->netdev,
573 "using legacy interrupts\n");
574 }
575
576 /* At this point we must have at least one irq */
577 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
578
579 /* map all interrupts to vector 0 */
580 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
581 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
582 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
583 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
584 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
585 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
586 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
587
588 if (intr->using_vectors) {
589 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
590 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
591 } else {
592 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
593 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
594 LAN743X_VECTOR_FLAG_IRQ_SHARED;
595 }
596
597 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
598 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
599 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
600 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
601 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
602 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
603 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
604 }
605
606 init_waitqueue_head(&intr->software_isr_wq);
607
608 ret = lan743x_intr_register_isr(adapter, 0, flags,
609 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
610 INT_BIT_ALL_OTHER_,
611 lan743x_intr_shared_isr, adapter);
612 if (ret)
613 goto clean_up;
614 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
615
616 if (intr->using_vectors)
617 lan743x_csr_write(adapter, INT_VEC_EN_SET,
618 INT_VEC_EN_(0));
619
620 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
621 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
622 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
623 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
624 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
625 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
626 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
627 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
628 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
629 if (adapter->is_pci11x1x) {
630 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD);
631 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD);
632 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654);
633 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210);
634 } else {
635 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
636 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
637 }
638 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
639 }
640
641 /* enable interrupts */
642 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
643 ret = lan743x_intr_test_isr(adapter);
644 if (ret)
645 goto clean_up;
646
647 if (intr->number_of_vectors > 1) {
648 int number_of_tx_vectors = intr->number_of_vectors - 1;
649
650 if (number_of_tx_vectors > used_tx_channels)
651 number_of_tx_vectors = used_tx_channels;
652 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
653 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
654 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
655 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
656 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
657 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
658
659 if (adapter->csr.flags &
660 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
661 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
662 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
663 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
664 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
665 }
666
667 for (index = 0; index < number_of_tx_vectors; index++) {
668 u32 int_bit = INT_BIT_DMA_TX_(index);
669 int vector = index + 1;
670
671 /* map TX interrupt to vector */
672 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
673 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
674
675 /* Remove TX interrupt from shared mask */
676 intr->vector_list[0].int_mask &= ~int_bit;
677 ret = lan743x_intr_register_isr(adapter, vector, flags,
678 int_bit, lan743x_tx_isr,
679 &adapter->tx[index]);
680 if (ret)
681 goto clean_up;
682 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
683 if (!(flags &
684 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
685 lan743x_csr_write(adapter, INT_VEC_EN_SET,
686 INT_VEC_EN_(vector));
687 }
688 }
689 if ((intr->number_of_vectors - used_tx_channels) > 1) {
690 int number_of_rx_vectors = intr->number_of_vectors -
691 used_tx_channels - 1;
692
693 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
694 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
695
696 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
697 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
698 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
699 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
700 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
701 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
702
703 if (adapter->csr.flags &
704 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
705 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
706 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
707 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
708 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
709 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
710 }
711 for (index = 0; index < number_of_rx_vectors; index++) {
712 int vector = index + 1 + used_tx_channels;
713 u32 int_bit = INT_BIT_DMA_RX_(index);
714
715 /* map RX interrupt to vector */
716 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
717 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
718 if (flags &
719 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
720 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
721 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
722 int_vec_en_auto_clr);
723 }
724
725 /* Remove RX interrupt from shared mask */
726 intr->vector_list[0].int_mask &= ~int_bit;
727 ret = lan743x_intr_register_isr(adapter, vector, flags,
728 int_bit, lan743x_rx_isr,
729 &adapter->rx[index]);
730 if (ret)
731 goto clean_up;
732 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
733
734 lan743x_csr_write(adapter, INT_VEC_EN_SET,
735 INT_VEC_EN_(vector));
736 }
737 }
738 return 0;
739
740 clean_up:
741 lan743x_intr_close(adapter);
742 return ret;
743 }
744
lan743x_dp_write(struct lan743x_adapter * adapter,u32 select,u32 addr,u32 length,u32 * buf)745 static int lan743x_dp_write(struct lan743x_adapter *adapter,
746 u32 select, u32 addr, u32 length, u32 *buf)
747 {
748 u32 dp_sel;
749 int i;
750
751 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_,
752 1, 40, 100, 100))
753 return -EIO;
754 dp_sel = lan743x_csr_read(adapter, DP_SEL);
755 dp_sel &= ~DP_SEL_MASK_;
756 dp_sel |= select;
757 lan743x_csr_write(adapter, DP_SEL, dp_sel);
758
759 for (i = 0; i < length; i++) {
760 lan743x_csr_write(adapter, DP_ADDR, addr + i);
761 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
762 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
763 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL,
764 DP_SEL_DPRDY_,
765 1, 40, 100, 100))
766 return -EIO;
767 }
768
769 return 0;
770 }
771
lan743x_mac_mii_access(u16 id,u16 index,int read)772 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
773 {
774 u32 ret;
775
776 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
777 MAC_MII_ACC_PHY_ADDR_MASK_;
778 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
779 MAC_MII_ACC_MIIRINDA_MASK_;
780
781 if (read)
782 ret |= MAC_MII_ACC_MII_READ_;
783 else
784 ret |= MAC_MII_ACC_MII_WRITE_;
785 ret |= MAC_MII_ACC_MII_BUSY_;
786
787 return ret;
788 }
789
lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter * adapter)790 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
791 {
792 u32 data;
793
794 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
795 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
796 }
797
lan743x_mdiobus_read_c22(struct mii_bus * bus,int phy_id,int index)798 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index)
799 {
800 struct lan743x_adapter *adapter = bus->priv;
801 u32 val, mii_access;
802 int ret;
803
804 /* comfirm MII not busy */
805 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
806 if (ret < 0)
807 return ret;
808
809 /* set the address, index & direction (read from PHY) */
810 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
811 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
812 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
813 if (ret < 0)
814 return ret;
815
816 val = lan743x_csr_read(adapter, MAC_MII_DATA);
817 return (int)(val & 0xFFFF);
818 }
819
lan743x_mdiobus_write_c22(struct mii_bus * bus,int phy_id,int index,u16 regval)820 static int lan743x_mdiobus_write_c22(struct mii_bus *bus,
821 int phy_id, int index, u16 regval)
822 {
823 struct lan743x_adapter *adapter = bus->priv;
824 u32 val, mii_access;
825 int ret;
826
827 /* confirm MII not busy */
828 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
829 if (ret < 0)
830 return ret;
831 val = (u32)regval;
832 lan743x_csr_write(adapter, MAC_MII_DATA, val);
833
834 /* set the address, index & direction (write to PHY) */
835 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
836 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
837 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
838 return ret;
839 }
840
lan743x_mac_mmd_access(int id,int dev_addr,int op)841 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op)
842 {
843 u32 ret;
844
845 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
846 MAC_MII_ACC_PHY_ADDR_MASK_;
847 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) &
848 MAC_MII_ACC_MIIMMD_MASK_;
849 if (op == MMD_ACCESS_WRITE)
850 ret |= MAC_MII_ACC_MIICMD_WRITE_;
851 else if (op == MMD_ACCESS_READ)
852 ret |= MAC_MII_ACC_MIICMD_READ_;
853 else if (op == MMD_ACCESS_READ_INC)
854 ret |= MAC_MII_ACC_MIICMD_READ_INC_;
855 else
856 ret |= MAC_MII_ACC_MIICMD_ADDR_;
857 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_);
858
859 return ret;
860 }
861
lan743x_mdiobus_read_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index)862 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id,
863 int dev_addr, int index)
864 {
865 struct lan743x_adapter *adapter = bus->priv;
866 u32 mmd_access;
867 int ret;
868
869 /* comfirm MII not busy */
870 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
871 if (ret < 0)
872 return ret;
873
874 /* Load Register Address */
875 lan743x_csr_write(adapter, MAC_MII_DATA, index);
876 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
877 MMD_ACCESS_ADDRESS);
878 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
879 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
880 if (ret < 0)
881 return ret;
882
883 /* Read Data */
884 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
885 MMD_ACCESS_READ);
886 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
887 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
888 if (ret < 0)
889 return ret;
890
891 ret = lan743x_csr_read(adapter, MAC_MII_DATA);
892 return (int)(ret & 0xFFFF);
893 }
894
lan743x_mdiobus_write_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index,u16 regval)895 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id,
896 int dev_addr, int index, u16 regval)
897 {
898 struct lan743x_adapter *adapter = bus->priv;
899 u32 mmd_access;
900 int ret;
901
902 /* confirm MII not busy */
903 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
904 if (ret < 0)
905 return ret;
906
907 /* Load Register Address */
908 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index);
909 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
910 MMD_ACCESS_ADDRESS);
911 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
912 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
913 if (ret < 0)
914 return ret;
915
916 /* Write Data */
917 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval);
918 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
919 MMD_ACCESS_WRITE);
920 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
921
922 return lan743x_mac_mii_wait_till_not_busy(adapter);
923 }
924
lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter * adapter)925 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter)
926 {
927 u32 data;
928 int ret;
929
930 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data,
931 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000);
932 if (ret < 0)
933 netif_err(adapter, drv, adapter->netdev,
934 "%s: error %d sgmii wait timeout\n", __func__, ret);
935
936 return ret;
937 }
938
lan743x_sgmii_read(struct lan743x_adapter * adapter,u8 mmd,u16 addr)939 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr)
940 {
941 u32 mmd_access;
942 int ret;
943 u32 val;
944
945 if (mmd > 31) {
946 netif_err(adapter, probe, adapter->netdev,
947 "%s mmd should <= 31\n", __func__);
948 return -EINVAL;
949 }
950
951 mutex_lock(&adapter->sgmii_rw_lock);
952 /* Load Register Address */
953 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
954 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_);
955 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
956 ret = lan743x_sgmii_wait_till_not_busy(adapter);
957 if (ret < 0)
958 goto sgmii_unlock;
959
960 val = lan743x_csr_read(adapter, SGMII_DATA);
961 ret = (int)(val & SGMII_DATA_MASK_);
962
963 sgmii_unlock:
964 mutex_unlock(&adapter->sgmii_rw_lock);
965
966 return ret;
967 }
968
lan743x_sgmii_write(struct lan743x_adapter * adapter,u8 mmd,u16 addr,u16 val)969 static int lan743x_sgmii_write(struct lan743x_adapter *adapter,
970 u8 mmd, u16 addr, u16 val)
971 {
972 u32 mmd_access;
973 int ret;
974
975 if (mmd > 31) {
976 netif_err(adapter, probe, adapter->netdev,
977 "%s mmd should <= 31\n", __func__);
978 return -EINVAL;
979 }
980 mutex_lock(&adapter->sgmii_rw_lock);
981 /* Load Register Data */
982 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_));
983 /* Load Register Address */
984 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
985 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_);
986 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
987 ret = lan743x_sgmii_wait_till_not_busy(adapter);
988 mutex_unlock(&adapter->sgmii_rw_lock);
989
990 return ret;
991 }
992
lan743x_sgmii_mpll_set(struct lan743x_adapter * adapter,u16 baud)993 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter,
994 u16 baud)
995 {
996 int mpllctrl0;
997 int mpllctrl1;
998 int miscctrl1;
999 int ret;
1000
1001 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1002 VR_MII_GEN2_4_MPLL_CTRL0);
1003 if (mpllctrl0 < 0)
1004 return mpllctrl0;
1005
1006 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_;
1007 if (baud == VR_MII_BAUD_RATE_1P25GBPS) {
1008 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100;
1009 /* mpll_baud_clk/4 */
1010 miscctrl1 = 0xA;
1011 } else {
1012 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125;
1013 /* mpll_baud_clk/2 */
1014 miscctrl1 = 0x5;
1015 }
1016
1017 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1018 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0);
1019 if (ret < 0)
1020 return ret;
1021
1022 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1023 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1);
1024 if (ret < 0)
1025 return ret;
1026
1027 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1028 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1);
1029 }
1030
lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter * adapter,bool enable)1031 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter,
1032 bool enable)
1033 {
1034 if (enable)
1035 return lan743x_sgmii_mpll_set(adapter,
1036 VR_MII_BAUD_RATE_3P125GBPS);
1037 else
1038 return lan743x_sgmii_mpll_set(adapter,
1039 VR_MII_BAUD_RATE_1P25GBPS);
1040 }
1041
lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter * adapter,bool * status)1042 static int lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter *adapter,
1043 bool *status)
1044 {
1045 int ret;
1046
1047 ret = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1048 VR_MII_GEN2_4_MPLL_CTRL1);
1049 if (ret < 0)
1050 return ret;
1051
1052 if (ret == VR_MII_MPLL_MULTIPLIER_125 ||
1053 ret == VR_MII_MPLL_MULTIPLIER_50)
1054 *status = true;
1055 else
1056 *status = false;
1057
1058 return 0;
1059 }
1060
lan743x_sgmii_aneg_update(struct lan743x_adapter * adapter)1061 static int lan743x_sgmii_aneg_update(struct lan743x_adapter *adapter)
1062 {
1063 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd;
1064 int mii_ctrl;
1065 int dgt_ctrl;
1066 int an_ctrl;
1067 int ret;
1068
1069 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE)
1070 /* Switch to 2.5 Gbps */
1071 ret = lan743x_sgmii_2_5G_mode_set(adapter, true);
1072 else
1073 /* Switch to 10/100/1000 Mbps clock */
1074 ret = lan743x_sgmii_2_5G_mode_set(adapter, false);
1075 if (ret < 0)
1076 return ret;
1077
1078 /* Enable SGMII Auto NEG */
1079 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1080 if (mii_ctrl < 0)
1081 return mii_ctrl;
1082
1083 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL);
1084 if (an_ctrl < 0)
1085 return an_ctrl;
1086
1087 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1088 VR_MII_DIG_CTRL1);
1089 if (dgt_ctrl < 0)
1090 return dgt_ctrl;
1091
1092 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) {
1093 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100);
1094 mii_ctrl |= BMCR_SPEED1000;
1095 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1096 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1097 /* In order for Auto-Negotiation to operate properly at
1098 * 2.5 Gbps the 1.6ms link timer values must be adjusted
1099 * The VR_MII_LINK_TIMER_CTRL Register must be set to
1100 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the
1101 * VR_MII_DIG_CTRL1 Register set to 1
1102 */
1103 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1104 VR_MII_LINK_TIMER_CTRL, 0x7A1);
1105 if (ret < 0)
1106 return ret;
1107 } else {
1108 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1109 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_;
1110 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1111 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1112 }
1113
1114 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR,
1115 mii_ctrl);
1116 if (ret < 0)
1117 return ret;
1118
1119 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1120 VR_MII_DIG_CTRL1, dgt_ctrl);
1121 if (ret < 0)
1122 return ret;
1123
1124 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1125 VR_MII_AN_CTRL, an_ctrl);
1126 }
1127
lan743x_pcs_seq_state(struct lan743x_adapter * adapter,u8 state)1128 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state)
1129 {
1130 u8 wait_cnt = 0;
1131 u32 dig_sts;
1132
1133 do {
1134 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1135 VR_MII_DIG_STS);
1136 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >>
1137 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state)
1138 break;
1139 usleep_range(1000, 2000);
1140 } while (wait_cnt++ < 10);
1141
1142 if (wait_cnt >= 10)
1143 return -ETIMEDOUT;
1144
1145 return 0;
1146 }
1147
lan743x_sgmii_config(struct lan743x_adapter * adapter)1148 static int lan743x_sgmii_config(struct lan743x_adapter *adapter)
1149 {
1150 struct net_device *netdev = adapter->netdev;
1151 struct phy_device *phydev = netdev->phydev;
1152 enum lan743x_sgmii_lsd lsd = POWER_DOWN;
1153 int mii_ctl;
1154 bool status;
1155 int ret;
1156
1157 switch (phydev->speed) {
1158 case SPEED_2500:
1159 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER)
1160 lsd = LINK_2500_MASTER;
1161 else
1162 lsd = LINK_2500_SLAVE;
1163 break;
1164 case SPEED_1000:
1165 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER)
1166 lsd = LINK_1000_MASTER;
1167 else
1168 lsd = LINK_1000_SLAVE;
1169 break;
1170 case SPEED_100:
1171 if (phydev->duplex)
1172 lsd = LINK_100FD;
1173 else
1174 lsd = LINK_100HD;
1175 break;
1176 case SPEED_10:
1177 if (phydev->duplex)
1178 lsd = LINK_10FD;
1179 else
1180 lsd = LINK_10HD;
1181 break;
1182 default:
1183 netif_err(adapter, drv, adapter->netdev,
1184 "Invalid speed %d\n", phydev->speed);
1185 return -EINVAL;
1186 }
1187
1188 adapter->sgmii_lsd = lsd;
1189 ret = lan743x_sgmii_aneg_update(adapter);
1190 if (ret < 0) {
1191 netif_err(adapter, drv, adapter->netdev,
1192 "error %d SGMII cfg failed\n", ret);
1193 return ret;
1194 }
1195
1196 ret = lan743x_is_sgmii_2_5G_mode(adapter, &status);
1197 if (ret < 0) {
1198 netif_err(adapter, drv, adapter->netdev,
1199 "erro %d SGMII get mode failed\n", ret);
1200 return ret;
1201 }
1202
1203 if (status)
1204 netif_dbg(adapter, drv, adapter->netdev,
1205 "SGMII 2.5G mode enable\n");
1206 else
1207 netif_dbg(adapter, drv, adapter->netdev,
1208 "SGMII 1G mode enable\n");
1209
1210 /* SGMII/1000/2500BASE-X PCS power down */
1211 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1212 if (mii_ctl < 0)
1213 return mii_ctl;
1214
1215 mii_ctl |= BMCR_PDOWN;
1216 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1217 if (ret < 0)
1218 return ret;
1219
1220 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN);
1221 if (ret < 0)
1222 return ret;
1223
1224 /* SGMII/1000/2500BASE-X PCS power up */
1225 mii_ctl &= ~BMCR_PDOWN;
1226 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1227 if (ret < 0)
1228 return ret;
1229
1230 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP);
1231 if (ret < 0)
1232 return ret;
1233
1234 return 0;
1235 }
1236
lan743x_mac_set_address(struct lan743x_adapter * adapter,u8 * addr)1237 static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
1238 u8 *addr)
1239 {
1240 u32 addr_lo, addr_hi;
1241
1242 addr_lo = addr[0] |
1243 addr[1] << 8 |
1244 addr[2] << 16 |
1245 addr[3] << 24;
1246 addr_hi = addr[4] |
1247 addr[5] << 8;
1248 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
1249 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
1250
1251 ether_addr_copy(adapter->mac_address, addr);
1252 netif_info(adapter, drv, adapter->netdev,
1253 "MAC address set to %pM\n", addr);
1254 }
1255
lan743x_mac_init(struct lan743x_adapter * adapter)1256 static int lan743x_mac_init(struct lan743x_adapter *adapter)
1257 {
1258 bool mac_address_valid = true;
1259 struct net_device *netdev;
1260 u32 mac_addr_hi = 0;
1261 u32 mac_addr_lo = 0;
1262 u32 data;
1263
1264 netdev = adapter->netdev;
1265
1266 /* disable auto duplex, and speed detection. Phylib does that */
1267 data = lan743x_csr_read(adapter, MAC_CR);
1268 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
1269 data |= MAC_CR_CNTR_RST_;
1270 lan743x_csr_write(adapter, MAC_CR, data);
1271
1272 if (!is_valid_ether_addr(adapter->mac_address)) {
1273 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
1274 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
1275 adapter->mac_address[0] = mac_addr_lo & 0xFF;
1276 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
1277 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
1278 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
1279 adapter->mac_address[4] = mac_addr_hi & 0xFF;
1280 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
1281
1282 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
1283 mac_addr_lo == 0xFFFFFFFF) {
1284 mac_address_valid = false;
1285 } else if (!is_valid_ether_addr(adapter->mac_address)) {
1286 mac_address_valid = false;
1287 }
1288
1289 if (!mac_address_valid)
1290 eth_random_addr(adapter->mac_address);
1291 }
1292 lan743x_mac_set_address(adapter, adapter->mac_address);
1293 eth_hw_addr_set(netdev, adapter->mac_address);
1294
1295 return 0;
1296 }
1297
lan743x_mac_open(struct lan743x_adapter * adapter)1298 static int lan743x_mac_open(struct lan743x_adapter *adapter)
1299 {
1300 u32 temp;
1301
1302 temp = lan743x_csr_read(adapter, MAC_RX);
1303 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
1304 temp = lan743x_csr_read(adapter, MAC_TX);
1305 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
1306 return 0;
1307 }
1308
lan743x_mac_close(struct lan743x_adapter * adapter)1309 static void lan743x_mac_close(struct lan743x_adapter *adapter)
1310 {
1311 u32 temp;
1312
1313 temp = lan743x_csr_read(adapter, MAC_TX);
1314 temp &= ~MAC_TX_TXEN_;
1315 lan743x_csr_write(adapter, MAC_TX, temp);
1316 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1317 1, 1000, 20000, 100);
1318
1319 temp = lan743x_csr_read(adapter, MAC_RX);
1320 temp &= ~MAC_RX_RXEN_;
1321 lan743x_csr_write(adapter, MAC_RX, temp);
1322 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1323 1, 1000, 20000, 100);
1324 }
1325
lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter * adapter,bool tx_enable,bool rx_enable)1326 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
1327 bool tx_enable, bool rx_enable)
1328 {
1329 u32 flow_setting = 0;
1330
1331 /* set maximum pause time because when fifo space frees
1332 * up a zero value pause frame will be sent to release the pause
1333 */
1334 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
1335 if (tx_enable)
1336 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
1337 if (rx_enable)
1338 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
1339 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
1340 }
1341
lan743x_mac_set_mtu(struct lan743x_adapter * adapter,int new_mtu)1342 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
1343 {
1344 int enabled = 0;
1345 u32 mac_rx = 0;
1346
1347 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1348 if (mac_rx & MAC_RX_RXEN_) {
1349 enabled = 1;
1350 if (mac_rx & MAC_RX_RXD_) {
1351 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1352 mac_rx &= ~MAC_RX_RXD_;
1353 }
1354 mac_rx &= ~MAC_RX_RXEN_;
1355 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1356 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1357 1, 1000, 20000, 100);
1358 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
1359 }
1360
1361 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
1362 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN)
1363 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1364 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1365
1366 if (enabled) {
1367 mac_rx |= MAC_RX_RXEN_;
1368 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1369 }
1370 return 0;
1371 }
1372
1373 /* PHY */
lan743x_phy_reset(struct lan743x_adapter * adapter)1374 static int lan743x_phy_reset(struct lan743x_adapter *adapter)
1375 {
1376 u32 data;
1377
1378 /* Only called with in probe, and before mdiobus_register */
1379
1380 data = lan743x_csr_read(adapter, PMT_CTL);
1381 data |= PMT_CTL_ETH_PHY_RST_;
1382 lan743x_csr_write(adapter, PMT_CTL, data);
1383
1384 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
1385 (!(data & PMT_CTL_ETH_PHY_RST_) &&
1386 (data & PMT_CTL_READY_)),
1387 50000, 1000000);
1388 }
1389
lan743x_phy_update_flowcontrol(struct lan743x_adapter * adapter,u16 local_adv,u16 remote_adv)1390 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
1391 u16 local_adv, u16 remote_adv)
1392 {
1393 struct lan743x_phy *phy = &adapter->phy;
1394 u8 cap;
1395
1396 if (phy->fc_autoneg)
1397 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
1398 else
1399 cap = phy->fc_request_control;
1400
1401 lan743x_mac_flow_ctrl_set_enables(adapter,
1402 cap & FLOW_CTRL_TX,
1403 cap & FLOW_CTRL_RX);
1404 }
1405
lan743x_phy_init(struct lan743x_adapter * adapter)1406 static int lan743x_phy_init(struct lan743x_adapter *adapter)
1407 {
1408 return lan743x_phy_reset(adapter);
1409 }
1410
lan743x_phy_link_status_change(struct net_device * netdev)1411 static void lan743x_phy_link_status_change(struct net_device *netdev)
1412 {
1413 struct lan743x_adapter *adapter = netdev_priv(netdev);
1414 struct phy_device *phydev = netdev->phydev;
1415 u32 data;
1416
1417 phy_print_status(phydev);
1418 if (phydev->state == PHY_RUNNING) {
1419 int remote_advertisement = 0;
1420 int local_advertisement = 0;
1421
1422 data = lan743x_csr_read(adapter, MAC_CR);
1423
1424 /* set duplex mode */
1425 if (phydev->duplex)
1426 data |= MAC_CR_DPX_;
1427 else
1428 data &= ~MAC_CR_DPX_;
1429
1430 /* set bus speed */
1431 switch (phydev->speed) {
1432 case SPEED_10:
1433 data &= ~MAC_CR_CFG_H_;
1434 data &= ~MAC_CR_CFG_L_;
1435 break;
1436 case SPEED_100:
1437 data &= ~MAC_CR_CFG_H_;
1438 data |= MAC_CR_CFG_L_;
1439 break;
1440 case SPEED_1000:
1441 data |= MAC_CR_CFG_H_;
1442 data &= ~MAC_CR_CFG_L_;
1443 break;
1444 case SPEED_2500:
1445 data |= MAC_CR_CFG_H_;
1446 data |= MAC_CR_CFG_L_;
1447 break;
1448 }
1449 lan743x_csr_write(adapter, MAC_CR, data);
1450
1451 local_advertisement =
1452 linkmode_adv_to_mii_adv_t(phydev->advertising);
1453 remote_advertisement =
1454 linkmode_adv_to_mii_adv_t(phydev->lp_advertising);
1455
1456 lan743x_phy_update_flowcontrol(adapter, local_advertisement,
1457 remote_advertisement);
1458 lan743x_ptp_update_latency(adapter, phydev->speed);
1459 if (phydev->interface == PHY_INTERFACE_MODE_SGMII ||
1460 phydev->interface == PHY_INTERFACE_MODE_1000BASEX ||
1461 phydev->interface == PHY_INTERFACE_MODE_2500BASEX)
1462 lan743x_sgmii_config(adapter);
1463 }
1464 }
1465
lan743x_phy_close(struct lan743x_adapter * adapter)1466 static void lan743x_phy_close(struct lan743x_adapter *adapter)
1467 {
1468 struct net_device *netdev = adapter->netdev;
1469
1470 phy_stop(netdev->phydev);
1471 phy_disconnect(netdev->phydev);
1472 }
1473
lan743x_phy_interface_select(struct lan743x_adapter * adapter)1474 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter)
1475 {
1476 u32 id_rev;
1477 u32 data;
1478
1479 data = lan743x_csr_read(adapter, MAC_CR);
1480 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_;
1481
1482 if (adapter->is_pci11x1x && adapter->is_sgmii_en)
1483 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII;
1484 else if (id_rev == ID_REV_ID_LAN7430_)
1485 adapter->phy_interface = PHY_INTERFACE_MODE_GMII;
1486 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_))
1487 adapter->phy_interface = PHY_INTERFACE_MODE_MII;
1488 else
1489 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII;
1490 }
1491
lan743x_phy_open(struct lan743x_adapter * adapter)1492 static int lan743x_phy_open(struct lan743x_adapter *adapter)
1493 {
1494 struct net_device *netdev = adapter->netdev;
1495 struct lan743x_phy *phy = &adapter->phy;
1496 struct fixed_phy_status fphy_status = {
1497 .link = 1,
1498 .speed = SPEED_1000,
1499 .duplex = DUPLEX_FULL,
1500 };
1501 struct phy_device *phydev;
1502 int ret = -EIO;
1503
1504 /* try devicetree phy, or fixed link */
1505 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node,
1506 lan743x_phy_link_status_change);
1507
1508 if (!phydev) {
1509 /* try internal phy */
1510 phydev = phy_find_first(adapter->mdiobus);
1511 if (!phydev) {
1512 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) ==
1513 ID_REV_ID_LAN7431_) {
1514 phydev = fixed_phy_register(PHY_POLL,
1515 &fphy_status, NULL);
1516 if (IS_ERR(phydev)) {
1517 netdev_err(netdev, "No PHY/fixed_PHY found\n");
1518 return PTR_ERR(phydev);
1519 }
1520 } else {
1521 goto return_error;
1522 }
1523 }
1524
1525 lan743x_phy_interface_select(adapter);
1526
1527 ret = phy_connect_direct(netdev, phydev,
1528 lan743x_phy_link_status_change,
1529 adapter->phy_interface);
1530 if (ret)
1531 goto return_error;
1532 }
1533
1534 /* MAC doesn't support 1000T Half */
1535 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
1536
1537 /* support both flow controls */
1538 phy_support_asym_pause(phydev);
1539 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
1540 phy->fc_autoneg = phydev->autoneg;
1541
1542 phy_start(phydev);
1543 phy_start_aneg(phydev);
1544 phy_attached_info(phydev);
1545 return 0;
1546
1547 return_error:
1548 return ret;
1549 }
1550
lan743x_rfe_open(struct lan743x_adapter * adapter)1551 static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1552 {
1553 lan743x_csr_write(adapter, RFE_RSS_CFG,
1554 RFE_RSS_CFG_UDP_IPV6_EX_ |
1555 RFE_RSS_CFG_TCP_IPV6_EX_ |
1556 RFE_RSS_CFG_IPV6_EX_ |
1557 RFE_RSS_CFG_UDP_IPV6_ |
1558 RFE_RSS_CFG_TCP_IPV6_ |
1559 RFE_RSS_CFG_IPV6_ |
1560 RFE_RSS_CFG_UDP_IPV4_ |
1561 RFE_RSS_CFG_TCP_IPV4_ |
1562 RFE_RSS_CFG_IPV4_ |
1563 RFE_RSS_CFG_VALID_HASH_BITS_ |
1564 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1565 RFE_RSS_CFG_RSS_HASH_STORE_ |
1566 RFE_RSS_CFG_RSS_ENABLE_);
1567 }
1568
lan743x_rfe_update_mac_address(struct lan743x_adapter * adapter)1569 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1570 {
1571 u8 *mac_addr;
1572 u32 mac_addr_hi = 0;
1573 u32 mac_addr_lo = 0;
1574
1575 /* Add mac address to perfect Filter */
1576 mac_addr = adapter->mac_address;
1577 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1578 (((u32)(mac_addr[1])) << 8) |
1579 (((u32)(mac_addr[2])) << 16) |
1580 (((u32)(mac_addr[3])) << 24));
1581 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1582 (((u32)(mac_addr[5])) << 8));
1583
1584 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1585 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1586 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1587 }
1588
lan743x_rfe_set_multicast(struct lan743x_adapter * adapter)1589 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1590 {
1591 struct net_device *netdev = adapter->netdev;
1592 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1593 u32 rfctl;
1594 u32 data;
1595
1596 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1597 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1598 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1599 rfctl |= RFE_CTL_AB_;
1600 if (netdev->flags & IFF_PROMISC) {
1601 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1602 } else {
1603 if (netdev->flags & IFF_ALLMULTI)
1604 rfctl |= RFE_CTL_AM_;
1605 }
1606
1607 if (netdev->features & NETIF_F_RXCSUM)
1608 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_;
1609
1610 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1611 if (netdev_mc_count(netdev)) {
1612 struct netdev_hw_addr *ha;
1613 int i;
1614
1615 rfctl |= RFE_CTL_DA_PERFECT_;
1616 i = 1;
1617 netdev_for_each_mc_addr(ha, netdev) {
1618 /* set first 32 into Perfect Filter */
1619 if (i < 33) {
1620 lan743x_csr_write(adapter,
1621 RFE_ADDR_FILT_HI(i), 0);
1622 data = ha->addr[3];
1623 data = ha->addr[2] | (data << 8);
1624 data = ha->addr[1] | (data << 8);
1625 data = ha->addr[0] | (data << 8);
1626 lan743x_csr_write(adapter,
1627 RFE_ADDR_FILT_LO(i), data);
1628 data = ha->addr[5];
1629 data = ha->addr[4] | (data << 8);
1630 data |= RFE_ADDR_FILT_HI_VALID_;
1631 lan743x_csr_write(adapter,
1632 RFE_ADDR_FILT_HI(i), data);
1633 } else {
1634 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1635 23) & 0x1FF;
1636 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1637 rfctl |= RFE_CTL_MCAST_HASH_;
1638 }
1639 i++;
1640 }
1641 }
1642
1643 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1644 DP_SEL_VHF_VLAN_LEN,
1645 DP_SEL_VHF_HASH_LEN, hash_table);
1646 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1647 }
1648
lan743x_dmac_init(struct lan743x_adapter * adapter)1649 static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1650 {
1651 u32 data = 0;
1652
1653 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1654 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1655 0, 1000, 20000, 100);
1656 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1657 case DMA_DESCRIPTOR_SPACING_16:
1658 data = DMAC_CFG_MAX_DSPACE_16_;
1659 break;
1660 case DMA_DESCRIPTOR_SPACING_32:
1661 data = DMAC_CFG_MAX_DSPACE_32_;
1662 break;
1663 case DMA_DESCRIPTOR_SPACING_64:
1664 data = DMAC_CFG_MAX_DSPACE_64_;
1665 break;
1666 case DMA_DESCRIPTOR_SPACING_128:
1667 data = DMAC_CFG_MAX_DSPACE_128_;
1668 break;
1669 default:
1670 return -EPERM;
1671 }
1672 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1673 data |= DMAC_CFG_COAL_EN_;
1674 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1675 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1676 lan743x_csr_write(adapter, DMAC_CFG, data);
1677 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1678 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1679 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1680 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1681 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1682 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1683 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1684 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1685 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1686 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1687 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1688 return 0;
1689 }
1690
lan743x_dmac_tx_get_state(struct lan743x_adapter * adapter,int tx_channel)1691 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1692 int tx_channel)
1693 {
1694 u32 dmac_cmd = 0;
1695
1696 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1697 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1698 DMAC_CMD_START_T_(tx_channel)),
1699 (dmac_cmd &
1700 DMAC_CMD_STOP_T_(tx_channel)));
1701 }
1702
lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter * adapter,int tx_channel)1703 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1704 int tx_channel)
1705 {
1706 int timeout = 100;
1707 int result = 0;
1708
1709 while (timeout &&
1710 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1711 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1712 usleep_range(1000, 20000);
1713 timeout--;
1714 }
1715 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1716 result = -ENODEV;
1717 return result;
1718 }
1719
lan743x_dmac_rx_get_state(struct lan743x_adapter * adapter,int rx_channel)1720 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1721 int rx_channel)
1722 {
1723 u32 dmac_cmd = 0;
1724
1725 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1726 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1727 DMAC_CMD_START_R_(rx_channel)),
1728 (dmac_cmd &
1729 DMAC_CMD_STOP_R_(rx_channel)));
1730 }
1731
lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter * adapter,int rx_channel)1732 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1733 int rx_channel)
1734 {
1735 int timeout = 100;
1736 int result = 0;
1737
1738 while (timeout &&
1739 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1740 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1741 usleep_range(1000, 20000);
1742 timeout--;
1743 }
1744 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1745 result = -ENODEV;
1746 return result;
1747 }
1748
lan743x_tx_release_desc(struct lan743x_tx * tx,int descriptor_index,bool cleanup)1749 static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1750 int descriptor_index, bool cleanup)
1751 {
1752 struct lan743x_tx_buffer_info *buffer_info = NULL;
1753 struct lan743x_tx_descriptor *descriptor = NULL;
1754 u32 descriptor_type = 0;
1755 bool ignore_sync;
1756
1757 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1758 buffer_info = &tx->buffer_info[descriptor_index];
1759 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1760 goto done;
1761
1762 descriptor_type = le32_to_cpu(descriptor->data0) &
1763 TX_DESC_DATA0_DTYPE_MASK_;
1764 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1765 goto clean_up_data_descriptor;
1766 else
1767 goto clear_active;
1768
1769 clean_up_data_descriptor:
1770 if (buffer_info->dma_ptr) {
1771 if (buffer_info->flags &
1772 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1773 dma_unmap_page(&tx->adapter->pdev->dev,
1774 buffer_info->dma_ptr,
1775 buffer_info->buffer_length,
1776 DMA_TO_DEVICE);
1777 } else {
1778 dma_unmap_single(&tx->adapter->pdev->dev,
1779 buffer_info->dma_ptr,
1780 buffer_info->buffer_length,
1781 DMA_TO_DEVICE);
1782 }
1783 buffer_info->dma_ptr = 0;
1784 buffer_info->buffer_length = 0;
1785 }
1786 if (!buffer_info->skb)
1787 goto clear_active;
1788
1789 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1790 dev_kfree_skb_any(buffer_info->skb);
1791 goto clear_skb;
1792 }
1793
1794 if (cleanup) {
1795 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1796 dev_kfree_skb_any(buffer_info->skb);
1797 } else {
1798 ignore_sync = (buffer_info->flags &
1799 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1800 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1801 buffer_info->skb, ignore_sync);
1802 }
1803
1804 clear_skb:
1805 buffer_info->skb = NULL;
1806
1807 clear_active:
1808 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1809
1810 done:
1811 memset(buffer_info, 0, sizeof(*buffer_info));
1812 memset(descriptor, 0, sizeof(*descriptor));
1813 }
1814
lan743x_tx_next_index(struct lan743x_tx * tx,int index)1815 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1816 {
1817 return ((++index) % tx->ring_size);
1818 }
1819
lan743x_tx_release_completed_descriptors(struct lan743x_tx * tx)1820 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1821 {
1822 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) {
1823 lan743x_tx_release_desc(tx, tx->last_head, false);
1824 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1825 }
1826 }
1827
lan743x_tx_release_all_descriptors(struct lan743x_tx * tx)1828 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1829 {
1830 u32 original_head = 0;
1831
1832 original_head = tx->last_head;
1833 do {
1834 lan743x_tx_release_desc(tx, tx->last_head, true);
1835 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1836 } while (tx->last_head != original_head);
1837 memset(tx->ring_cpu_ptr, 0,
1838 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1839 memset(tx->buffer_info, 0,
1840 sizeof(*tx->buffer_info) * (tx->ring_size));
1841 }
1842
lan743x_tx_get_desc_cnt(struct lan743x_tx * tx,struct sk_buff * skb)1843 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1844 struct sk_buff *skb)
1845 {
1846 int result = 1; /* 1 for the main skb buffer */
1847 int nr_frags = 0;
1848
1849 if (skb_is_gso(skb))
1850 result++; /* requires an extension descriptor */
1851 nr_frags = skb_shinfo(skb)->nr_frags;
1852 result += nr_frags; /* 1 for each fragment buffer */
1853 return result;
1854 }
1855
lan743x_tx_get_avail_desc(struct lan743x_tx * tx)1856 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1857 {
1858 int last_head = tx->last_head;
1859 int last_tail = tx->last_tail;
1860
1861 if (last_tail >= last_head)
1862 return tx->ring_size - last_tail + last_head - 1;
1863 else
1864 return last_head - last_tail - 1;
1865 }
1866
lan743x_tx_set_timestamping_mode(struct lan743x_tx * tx,bool enable_timestamping,bool enable_onestep_sync)1867 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1868 bool enable_timestamping,
1869 bool enable_onestep_sync)
1870 {
1871 if (enable_timestamping)
1872 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1873 else
1874 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1875 if (enable_onestep_sync)
1876 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1877 else
1878 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1879 }
1880
lan743x_tx_frame_start(struct lan743x_tx * tx,unsigned char * first_buffer,unsigned int first_buffer_length,unsigned int frame_length,bool time_stamp,bool check_sum)1881 static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1882 unsigned char *first_buffer,
1883 unsigned int first_buffer_length,
1884 unsigned int frame_length,
1885 bool time_stamp,
1886 bool check_sum)
1887 {
1888 /* called only from within lan743x_tx_xmit_frame.
1889 * assuming tx->ring_lock has already been acquired.
1890 */
1891 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1892 struct lan743x_tx_buffer_info *buffer_info = NULL;
1893 struct lan743x_adapter *adapter = tx->adapter;
1894 struct device *dev = &adapter->pdev->dev;
1895 dma_addr_t dma_ptr;
1896
1897 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1898 tx->frame_first = tx->last_tail;
1899 tx->frame_tail = tx->frame_first;
1900
1901 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1902 buffer_info = &tx->buffer_info[tx->frame_tail];
1903 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1904 DMA_TO_DEVICE);
1905 if (dma_mapping_error(dev, dma_ptr))
1906 return -ENOMEM;
1907
1908 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1909 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1910 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1911 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1912
1913 buffer_info->skb = NULL;
1914 buffer_info->dma_ptr = dma_ptr;
1915 buffer_info->buffer_length = first_buffer_length;
1916 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1917
1918 tx->frame_data0 = (first_buffer_length &
1919 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1920 TX_DESC_DATA0_DTYPE_DATA_ |
1921 TX_DESC_DATA0_FS_ |
1922 TX_DESC_DATA0_FCS_;
1923 if (time_stamp)
1924 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1925
1926 if (check_sum)
1927 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1928 TX_DESC_DATA0_IPE_ |
1929 TX_DESC_DATA0_TPE_;
1930
1931 /* data0 will be programmed in one of other frame assembler functions */
1932 return 0;
1933 }
1934
lan743x_tx_frame_add_lso(struct lan743x_tx * tx,unsigned int frame_length,int nr_frags)1935 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1936 unsigned int frame_length,
1937 int nr_frags)
1938 {
1939 /* called only from within lan743x_tx_xmit_frame.
1940 * assuming tx->ring_lock has already been acquired.
1941 */
1942 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1943 struct lan743x_tx_buffer_info *buffer_info = NULL;
1944
1945 /* wrap up previous descriptor */
1946 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1947 if (nr_frags <= 0) {
1948 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1949 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1950 }
1951 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1952 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1953
1954 /* move to next descriptor */
1955 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1956 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1957 buffer_info = &tx->buffer_info[tx->frame_tail];
1958
1959 /* add extension descriptor */
1960 tx_descriptor->data1 = 0;
1961 tx_descriptor->data2 = 0;
1962 tx_descriptor->data3 = 0;
1963
1964 buffer_info->skb = NULL;
1965 buffer_info->dma_ptr = 0;
1966 buffer_info->buffer_length = 0;
1967 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1968
1969 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1970 TX_DESC_DATA0_DTYPE_EXT_ |
1971 TX_DESC_DATA0_EXT_LSO_;
1972
1973 /* data0 will be programmed in one of other frame assembler functions */
1974 }
1975
lan743x_tx_frame_add_fragment(struct lan743x_tx * tx,const skb_frag_t * fragment,unsigned int frame_length)1976 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1977 const skb_frag_t *fragment,
1978 unsigned int frame_length)
1979 {
1980 /* called only from within lan743x_tx_xmit_frame
1981 * assuming tx->ring_lock has already been acquired
1982 */
1983 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1984 struct lan743x_tx_buffer_info *buffer_info = NULL;
1985 struct lan743x_adapter *adapter = tx->adapter;
1986 struct device *dev = &adapter->pdev->dev;
1987 unsigned int fragment_length = 0;
1988 dma_addr_t dma_ptr;
1989
1990 fragment_length = skb_frag_size(fragment);
1991 if (!fragment_length)
1992 return 0;
1993
1994 /* wrap up previous descriptor */
1995 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1996 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1997
1998 /* move to next descriptor */
1999 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
2000 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
2001 buffer_info = &tx->buffer_info[tx->frame_tail];
2002 dma_ptr = skb_frag_dma_map(dev, fragment,
2003 0, fragment_length,
2004 DMA_TO_DEVICE);
2005 if (dma_mapping_error(dev, dma_ptr)) {
2006 int desc_index;
2007
2008 /* cleanup all previously setup descriptors */
2009 desc_index = tx->frame_first;
2010 while (desc_index != tx->frame_tail) {
2011 lan743x_tx_release_desc(tx, desc_index, true);
2012 desc_index = lan743x_tx_next_index(tx, desc_index);
2013 }
2014 dma_wmb();
2015 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
2016 tx->frame_first = 0;
2017 tx->frame_data0 = 0;
2018 tx->frame_tail = 0;
2019 return -ENOMEM;
2020 }
2021
2022 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
2023 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
2024 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
2025 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
2026
2027 buffer_info->skb = NULL;
2028 buffer_info->dma_ptr = dma_ptr;
2029 buffer_info->buffer_length = fragment_length;
2030 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
2031 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
2032
2033 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
2034 TX_DESC_DATA0_DTYPE_DATA_ |
2035 TX_DESC_DATA0_FCS_;
2036
2037 /* data0 will be programmed in one of other frame assembler functions */
2038 return 0;
2039 }
2040
lan743x_tx_frame_end(struct lan743x_tx * tx,struct sk_buff * skb,bool time_stamp,bool ignore_sync)2041 static void lan743x_tx_frame_end(struct lan743x_tx *tx,
2042 struct sk_buff *skb,
2043 bool time_stamp,
2044 bool ignore_sync)
2045 {
2046 /* called only from within lan743x_tx_xmit_frame
2047 * assuming tx->ring_lock has already been acquired
2048 */
2049 struct lan743x_tx_descriptor *tx_descriptor = NULL;
2050 struct lan743x_tx_buffer_info *buffer_info = NULL;
2051 struct lan743x_adapter *adapter = tx->adapter;
2052 u32 tx_tail_flags = 0;
2053
2054 /* wrap up previous descriptor */
2055 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
2056 TX_DESC_DATA0_DTYPE_DATA_) {
2057 tx->frame_data0 |= TX_DESC_DATA0_LS_;
2058 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
2059 }
2060
2061 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
2062 buffer_info = &tx->buffer_info[tx->frame_tail];
2063 buffer_info->skb = skb;
2064 if (time_stamp)
2065 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
2066 if (ignore_sync)
2067 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
2068
2069 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
2070 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
2071 tx->last_tail = tx->frame_tail;
2072
2073 dma_wmb();
2074
2075 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2076 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
2077 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
2078 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
2079 TX_TAIL_SET_TOP_INT_EN_;
2080
2081 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2082 tx_tail_flags | tx->frame_tail);
2083 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
2084 }
2085
lan743x_tx_xmit_frame(struct lan743x_tx * tx,struct sk_buff * skb)2086 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
2087 struct sk_buff *skb)
2088 {
2089 int required_number_of_descriptors = 0;
2090 unsigned int start_frame_length = 0;
2091 netdev_tx_t retval = NETDEV_TX_OK;
2092 unsigned int frame_length = 0;
2093 unsigned int head_length = 0;
2094 unsigned long irq_flags = 0;
2095 bool do_timestamp = false;
2096 bool ignore_sync = false;
2097 struct netdev_queue *txq;
2098 int nr_frags = 0;
2099 bool gso = false;
2100 int j;
2101
2102 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
2103
2104 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2105 if (required_number_of_descriptors >
2106 lan743x_tx_get_avail_desc(tx)) {
2107 if (required_number_of_descriptors > (tx->ring_size - 1)) {
2108 dev_kfree_skb_irq(skb);
2109 } else {
2110 /* save how many descriptors we needed to restart the queue */
2111 tx->rqd_descriptors = required_number_of_descriptors;
2112 retval = NETDEV_TX_BUSY;
2113 txq = netdev_get_tx_queue(tx->adapter->netdev,
2114 tx->channel_number);
2115 netif_tx_stop_queue(txq);
2116 }
2117 goto unlock;
2118 }
2119
2120 /* space available, transmit skb */
2121 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
2122 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
2123 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
2124 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2125 do_timestamp = true;
2126 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
2127 ignore_sync = true;
2128 }
2129 head_length = skb_headlen(skb);
2130 frame_length = skb_pagelen(skb);
2131 nr_frags = skb_shinfo(skb)->nr_frags;
2132 start_frame_length = frame_length;
2133 gso = skb_is_gso(skb);
2134 if (gso) {
2135 start_frame_length = max(skb_shinfo(skb)->gso_size,
2136 (unsigned short)8);
2137 }
2138
2139 if (lan743x_tx_frame_start(tx,
2140 skb->data, head_length,
2141 start_frame_length,
2142 do_timestamp,
2143 skb->ip_summed == CHECKSUM_PARTIAL)) {
2144 dev_kfree_skb_irq(skb);
2145 goto unlock;
2146 }
2147 tx->frame_count++;
2148
2149 if (gso)
2150 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
2151
2152 if (nr_frags <= 0)
2153 goto finish;
2154
2155 for (j = 0; j < nr_frags; j++) {
2156 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
2157
2158 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
2159 /* upon error no need to call
2160 * lan743x_tx_frame_end
2161 * frame assembler clean up was performed inside
2162 * lan743x_tx_frame_add_fragment
2163 */
2164 dev_kfree_skb_irq(skb);
2165 goto unlock;
2166 }
2167 }
2168
2169 finish:
2170 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
2171
2172 unlock:
2173 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2174 return retval;
2175 }
2176
lan743x_tx_napi_poll(struct napi_struct * napi,int weight)2177 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
2178 {
2179 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
2180 struct lan743x_adapter *adapter = tx->adapter;
2181 unsigned long irq_flags = 0;
2182 struct netdev_queue *txq;
2183 u32 ioc_bit = 0;
2184
2185 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
2186 lan743x_csr_read(adapter, DMAC_INT_STS);
2187 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
2188 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
2189 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2190
2191 /* clean up tx ring */
2192 lan743x_tx_release_completed_descriptors(tx);
2193 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number);
2194 if (netif_tx_queue_stopped(txq)) {
2195 if (tx->rqd_descriptors) {
2196 if (tx->rqd_descriptors <=
2197 lan743x_tx_get_avail_desc(tx)) {
2198 tx->rqd_descriptors = 0;
2199 netif_tx_wake_queue(txq);
2200 }
2201 } else {
2202 netif_tx_wake_queue(txq);
2203 }
2204 }
2205 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2206
2207 if (!napi_complete(napi))
2208 goto done;
2209
2210 /* enable isr */
2211 lan743x_csr_write(adapter, INT_EN_SET,
2212 INT_BIT_DMA_TX_(tx->channel_number));
2213 lan743x_csr_read(adapter, INT_STS);
2214
2215 done:
2216 return 0;
2217 }
2218
lan743x_tx_ring_cleanup(struct lan743x_tx * tx)2219 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
2220 {
2221 if (tx->head_cpu_ptr) {
2222 dma_free_coherent(&tx->adapter->pdev->dev,
2223 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr,
2224 tx->head_dma_ptr);
2225 tx->head_cpu_ptr = NULL;
2226 tx->head_dma_ptr = 0;
2227 }
2228 kfree(tx->buffer_info);
2229 tx->buffer_info = NULL;
2230
2231 if (tx->ring_cpu_ptr) {
2232 dma_free_coherent(&tx->adapter->pdev->dev,
2233 tx->ring_allocation_size, tx->ring_cpu_ptr,
2234 tx->ring_dma_ptr);
2235 tx->ring_allocation_size = 0;
2236 tx->ring_cpu_ptr = NULL;
2237 tx->ring_dma_ptr = 0;
2238 }
2239 tx->ring_size = 0;
2240 }
2241
lan743x_tx_ring_init(struct lan743x_tx * tx)2242 static int lan743x_tx_ring_init(struct lan743x_tx *tx)
2243 {
2244 size_t ring_allocation_size = 0;
2245 void *cpu_ptr = NULL;
2246 dma_addr_t dma_ptr;
2247 int ret = -ENOMEM;
2248
2249 tx->ring_size = LAN743X_TX_RING_SIZE;
2250 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
2251 ret = -EINVAL;
2252 goto cleanup;
2253 }
2254 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
2255 DMA_BIT_MASK(64))) {
2256 dev_warn(&tx->adapter->pdev->dev,
2257 "lan743x_: No suitable DMA available\n");
2258 ret = -ENOMEM;
2259 goto cleanup;
2260 }
2261 ring_allocation_size = ALIGN(tx->ring_size *
2262 sizeof(struct lan743x_tx_descriptor),
2263 PAGE_SIZE);
2264 dma_ptr = 0;
2265 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2266 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2267 if (!cpu_ptr) {
2268 ret = -ENOMEM;
2269 goto cleanup;
2270 }
2271
2272 tx->ring_allocation_size = ring_allocation_size;
2273 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
2274 tx->ring_dma_ptr = dma_ptr;
2275
2276 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
2277 if (!cpu_ptr) {
2278 ret = -ENOMEM;
2279 goto cleanup;
2280 }
2281 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
2282 dma_ptr = 0;
2283 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2284 sizeof(*tx->head_cpu_ptr), &dma_ptr,
2285 GFP_KERNEL);
2286 if (!cpu_ptr) {
2287 ret = -ENOMEM;
2288 goto cleanup;
2289 }
2290
2291 tx->head_cpu_ptr = cpu_ptr;
2292 tx->head_dma_ptr = dma_ptr;
2293 if (tx->head_dma_ptr & 0x3) {
2294 ret = -ENOMEM;
2295 goto cleanup;
2296 }
2297
2298 return 0;
2299
2300 cleanup:
2301 lan743x_tx_ring_cleanup(tx);
2302 return ret;
2303 }
2304
lan743x_tx_close(struct lan743x_tx * tx)2305 static void lan743x_tx_close(struct lan743x_tx *tx)
2306 {
2307 struct lan743x_adapter *adapter = tx->adapter;
2308
2309 lan743x_csr_write(adapter,
2310 DMAC_CMD,
2311 DMAC_CMD_STOP_T_(tx->channel_number));
2312 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
2313
2314 lan743x_csr_write(adapter,
2315 DMAC_INT_EN_CLR,
2316 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2317 lan743x_csr_write(adapter, INT_EN_CLR,
2318 INT_BIT_DMA_TX_(tx->channel_number));
2319 napi_disable(&tx->napi);
2320 netif_napi_del(&tx->napi);
2321
2322 lan743x_csr_write(adapter, FCT_TX_CTL,
2323 FCT_TX_CTL_DIS_(tx->channel_number));
2324 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2325 FCT_TX_CTL_EN_(tx->channel_number),
2326 0, 1000, 20000, 100);
2327
2328 lan743x_tx_release_all_descriptors(tx);
2329
2330 tx->rqd_descriptors = 0;
2331
2332 lan743x_tx_ring_cleanup(tx);
2333 }
2334
lan743x_tx_open(struct lan743x_tx * tx)2335 static int lan743x_tx_open(struct lan743x_tx *tx)
2336 {
2337 struct lan743x_adapter *adapter = NULL;
2338 u32 data = 0;
2339 int ret;
2340
2341 adapter = tx->adapter;
2342 ret = lan743x_tx_ring_init(tx);
2343 if (ret)
2344 return ret;
2345
2346 /* initialize fifo */
2347 lan743x_csr_write(adapter, FCT_TX_CTL,
2348 FCT_TX_CTL_RESET_(tx->channel_number));
2349 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2350 FCT_TX_CTL_RESET_(tx->channel_number),
2351 0, 1000, 20000, 100);
2352
2353 /* enable fifo */
2354 lan743x_csr_write(adapter, FCT_TX_CTL,
2355 FCT_TX_CTL_EN_(tx->channel_number));
2356
2357 /* reset tx channel */
2358 lan743x_csr_write(adapter, DMAC_CMD,
2359 DMAC_CMD_TX_SWR_(tx->channel_number));
2360 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2361 DMAC_CMD_TX_SWR_(tx->channel_number),
2362 0, 1000, 20000, 100);
2363
2364 /* Write TX_BASE_ADDR */
2365 lan743x_csr_write(adapter,
2366 TX_BASE_ADDRH(tx->channel_number),
2367 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
2368 lan743x_csr_write(adapter,
2369 TX_BASE_ADDRL(tx->channel_number),
2370 DMA_ADDR_LOW32(tx->ring_dma_ptr));
2371
2372 /* Write TX_CFG_B */
2373 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
2374 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
2375 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
2376 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2377 data |= TX_CFG_B_TDMABL_512_;
2378 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
2379
2380 /* Write TX_CFG_A */
2381 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
2382 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2383 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
2384 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
2385 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
2386 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
2387 }
2388 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
2389
2390 /* Write TX_HEAD_WRITEBACK_ADDR */
2391 lan743x_csr_write(adapter,
2392 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
2393 DMA_ADDR_HIGH32(tx->head_dma_ptr));
2394 lan743x_csr_write(adapter,
2395 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
2396 DMA_ADDR_LOW32(tx->head_dma_ptr));
2397
2398 /* set last head */
2399 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
2400
2401 /* write TX_TAIL */
2402 tx->last_tail = 0;
2403 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2404 (u32)(tx->last_tail));
2405 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2406 INT_BIT_DMA_TX_
2407 (tx->channel_number));
2408 netif_napi_add_tx_weight(adapter->netdev,
2409 &tx->napi, lan743x_tx_napi_poll,
2410 NAPI_POLL_WEIGHT);
2411 napi_enable(&tx->napi);
2412
2413 data = 0;
2414 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2415 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
2416 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2417 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
2418 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2419 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
2420 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2421 data |= TX_CFG_C_TX_INT_EN_R2C_;
2422 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
2423
2424 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
2425 lan743x_csr_write(adapter, INT_EN_SET,
2426 INT_BIT_DMA_TX_(tx->channel_number));
2427 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2428 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2429
2430 /* start dmac channel */
2431 lan743x_csr_write(adapter, DMAC_CMD,
2432 DMAC_CMD_START_T_(tx->channel_number));
2433 return 0;
2434 }
2435
lan743x_rx_next_index(struct lan743x_rx * rx,int index)2436 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
2437 {
2438 return ((++index) % rx->ring_size);
2439 }
2440
lan743x_rx_update_tail(struct lan743x_rx * rx,int index)2441 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
2442 {
2443 /* update the tail once per 8 descriptors */
2444 if ((index & 7) == 7)
2445 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
2446 index);
2447 }
2448
lan743x_rx_init_ring_element(struct lan743x_rx * rx,int index,gfp_t gfp)2449 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
2450 gfp_t gfp)
2451 {
2452 struct net_device *netdev = rx->adapter->netdev;
2453 struct device *dev = &rx->adapter->pdev->dev;
2454 struct lan743x_rx_buffer_info *buffer_info;
2455 unsigned int buffer_length, used_length;
2456 struct lan743x_rx_descriptor *descriptor;
2457 struct sk_buff *skb;
2458 dma_addr_t dma_ptr;
2459
2460 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING;
2461
2462 descriptor = &rx->ring_cpu_ptr[index];
2463 buffer_info = &rx->buffer_info[index];
2464 skb = __netdev_alloc_skb(netdev, buffer_length, gfp);
2465 if (!skb)
2466 return -ENOMEM;
2467 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE);
2468 if (dma_mapping_error(dev, dma_ptr)) {
2469 dev_kfree_skb_any(skb);
2470 return -ENOMEM;
2471 }
2472 if (buffer_info->dma_ptr) {
2473 /* sync used area of buffer only */
2474 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_)
2475 /* frame length is valid only if LS bit is set.
2476 * it's a safe upper bound for the used area in this
2477 * buffer.
2478 */
2479 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_
2480 (le32_to_cpu(descriptor->data0)),
2481 buffer_info->buffer_length);
2482 else
2483 used_length = buffer_info->buffer_length;
2484 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr,
2485 used_length,
2486 DMA_FROM_DEVICE);
2487 dma_unmap_single_attrs(dev, buffer_info->dma_ptr,
2488 buffer_info->buffer_length,
2489 DMA_FROM_DEVICE,
2490 DMA_ATTR_SKIP_CPU_SYNC);
2491 }
2492
2493 buffer_info->skb = skb;
2494 buffer_info->dma_ptr = dma_ptr;
2495 buffer_info->buffer_length = buffer_length;
2496 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2497 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2498 descriptor->data3 = 0;
2499 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2500 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2501 lan743x_rx_update_tail(rx, index);
2502
2503 return 0;
2504 }
2505
lan743x_rx_reuse_ring_element(struct lan743x_rx * rx,int index)2506 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
2507 {
2508 struct lan743x_rx_buffer_info *buffer_info;
2509 struct lan743x_rx_descriptor *descriptor;
2510
2511 descriptor = &rx->ring_cpu_ptr[index];
2512 buffer_info = &rx->buffer_info[index];
2513
2514 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2515 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2516 descriptor->data3 = 0;
2517 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2518 ((buffer_info->buffer_length) &
2519 RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2520 lan743x_rx_update_tail(rx, index);
2521 }
2522
lan743x_rx_release_ring_element(struct lan743x_rx * rx,int index)2523 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
2524 {
2525 struct lan743x_rx_buffer_info *buffer_info;
2526 struct lan743x_rx_descriptor *descriptor;
2527
2528 descriptor = &rx->ring_cpu_ptr[index];
2529 buffer_info = &rx->buffer_info[index];
2530
2531 memset(descriptor, 0, sizeof(*descriptor));
2532
2533 if (buffer_info->dma_ptr) {
2534 dma_unmap_single(&rx->adapter->pdev->dev,
2535 buffer_info->dma_ptr,
2536 buffer_info->buffer_length,
2537 DMA_FROM_DEVICE);
2538 buffer_info->dma_ptr = 0;
2539 }
2540
2541 if (buffer_info->skb) {
2542 dev_kfree_skb(buffer_info->skb);
2543 buffer_info->skb = NULL;
2544 }
2545
2546 memset(buffer_info, 0, sizeof(*buffer_info));
2547 }
2548
2549 static struct sk_buff *
lan743x_rx_trim_skb(struct sk_buff * skb,int frame_length)2550 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length)
2551 {
2552 if (skb_linearize(skb)) {
2553 dev_kfree_skb_irq(skb);
2554 return NULL;
2555 }
2556 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN);
2557 if (skb->len > frame_length) {
2558 skb->tail -= skb->len - frame_length;
2559 skb->len = frame_length;
2560 }
2561 return skb;
2562 }
2563
lan743x_rx_process_buffer(struct lan743x_rx * rx)2564 static int lan743x_rx_process_buffer(struct lan743x_rx *rx)
2565 {
2566 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr);
2567 struct lan743x_rx_descriptor *descriptor, *desc_ext;
2568 struct net_device *netdev = rx->adapter->netdev;
2569 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2570 struct lan743x_rx_buffer_info *buffer_info;
2571 int frame_length, buffer_length;
2572 bool is_ice, is_tce, is_icsm;
2573 int extension_index = -1;
2574 bool is_last, is_first;
2575 struct sk_buff *skb;
2576
2577 if (current_head_index < 0 || current_head_index >= rx->ring_size)
2578 goto done;
2579
2580 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2581 goto done;
2582
2583 if (rx->last_head == current_head_index)
2584 goto done;
2585
2586 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2587 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_)
2588 goto done;
2589 buffer_info = &rx->buffer_info[rx->last_head];
2590
2591 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_;
2592 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_;
2593
2594 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) {
2595 /* extension is expected to follow */
2596 int index = lan743x_rx_next_index(rx, rx->last_head);
2597
2598 if (index == current_head_index)
2599 /* extension not yet available */
2600 goto done;
2601 desc_ext = &rx->ring_cpu_ptr[index];
2602 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_)
2603 /* extension not yet available */
2604 goto done;
2605 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_))
2606 goto move_forward;
2607 extension_index = index;
2608 }
2609
2610 /* Only the last buffer in a multi-buffer frame contains the total frame
2611 * length. The chip occasionally sends more buffers than strictly
2612 * required to reach the total frame length.
2613 * Handle this by adding all buffers to the skb in their entirety.
2614 * Once the real frame length is known, trim the skb.
2615 */
2616 frame_length =
2617 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0));
2618 buffer_length = buffer_info->buffer_length;
2619 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_;
2620 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_;
2621 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_;
2622
2623 netdev_dbg(netdev, "%s%schunk: %d/%d",
2624 is_first ? "first " : " ",
2625 is_last ? "last " : " ",
2626 frame_length, buffer_length);
2627
2628 /* save existing skb, allocate new skb and map to dma */
2629 skb = buffer_info->skb;
2630 if (lan743x_rx_init_ring_element(rx, rx->last_head,
2631 GFP_ATOMIC | GFP_DMA)) {
2632 /* failed to allocate next skb.
2633 * Memory is very low.
2634 * Drop this packet and reuse buffer.
2635 */
2636 lan743x_rx_reuse_ring_element(rx, rx->last_head);
2637 /* drop packet that was being assembled */
2638 dev_kfree_skb_irq(rx->skb_head);
2639 rx->skb_head = NULL;
2640 goto process_extension;
2641 }
2642
2643 /* add buffers to skb via skb->frag_list */
2644 if (is_first) {
2645 skb_reserve(skb, RX_HEAD_PADDING);
2646 skb_put(skb, buffer_length - RX_HEAD_PADDING);
2647 if (rx->skb_head)
2648 dev_kfree_skb_irq(rx->skb_head);
2649 rx->skb_head = skb;
2650 } else if (rx->skb_head) {
2651 skb_put(skb, buffer_length);
2652 if (skb_shinfo(rx->skb_head)->frag_list)
2653 rx->skb_tail->next = skb;
2654 else
2655 skb_shinfo(rx->skb_head)->frag_list = skb;
2656 rx->skb_tail = skb;
2657 rx->skb_head->len += skb->len;
2658 rx->skb_head->data_len += skb->len;
2659 rx->skb_head->truesize += skb->truesize;
2660 } else {
2661 /* packet to assemble has already been dropped because one or
2662 * more of its buffers could not be allocated
2663 */
2664 netdev_dbg(netdev, "drop buffer intended for dropped packet");
2665 dev_kfree_skb_irq(skb);
2666 }
2667
2668 process_extension:
2669 if (extension_index >= 0) {
2670 u32 ts_sec;
2671 u32 ts_nsec;
2672
2673 ts_sec = le32_to_cpu(desc_ext->data1);
2674 ts_nsec = (le32_to_cpu(desc_ext->data2) &
2675 RX_DESC_DATA2_TS_NS_MASK_);
2676 if (rx->skb_head)
2677 skb_hwtstamps(rx->skb_head)->hwtstamp =
2678 ktime_set(ts_sec, ts_nsec);
2679 lan743x_rx_reuse_ring_element(rx, extension_index);
2680 rx->last_head = extension_index;
2681 netdev_dbg(netdev, "process extension");
2682 }
2683
2684 if (is_last && rx->skb_head)
2685 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length);
2686
2687 if (is_last && rx->skb_head) {
2688 rx->skb_head->protocol = eth_type_trans(rx->skb_head,
2689 rx->adapter->netdev);
2690 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) {
2691 if (!is_ice && !is_tce && !is_icsm)
2692 skb->ip_summed = CHECKSUM_UNNECESSARY;
2693 }
2694 netdev_dbg(netdev, "sending %d byte frame to OS",
2695 rx->skb_head->len);
2696 napi_gro_receive(&rx->napi, rx->skb_head);
2697 rx->skb_head = NULL;
2698 }
2699
2700 move_forward:
2701 /* push tail and head forward */
2702 rx->last_tail = rx->last_head;
2703 rx->last_head = lan743x_rx_next_index(rx, rx->last_head);
2704 result = RX_PROCESS_RESULT_BUFFER_RECEIVED;
2705 done:
2706 return result;
2707 }
2708
lan743x_rx_napi_poll(struct napi_struct * napi,int weight)2709 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2710 {
2711 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2712 struct lan743x_adapter *adapter = rx->adapter;
2713 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2714 u32 rx_tail_flags = 0;
2715 int count;
2716
2717 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2718 /* clear int status bit before reading packet */
2719 lan743x_csr_write(adapter, DMAC_INT_STS,
2720 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2721 }
2722 for (count = 0; count < weight; count++) {
2723 result = lan743x_rx_process_buffer(rx);
2724 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2725 break;
2726 }
2727 rx->frame_count += count;
2728 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED)
2729 return weight;
2730
2731 if (!napi_complete_done(napi, count))
2732 return count;
2733
2734 /* re-arm interrupts, must write to rx tail on some chip variants */
2735 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2736 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2737 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2738 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2739 } else {
2740 lan743x_csr_write(adapter, INT_EN_SET,
2741 INT_BIT_DMA_RX_(rx->channel_number));
2742 }
2743
2744 if (rx_tail_flags)
2745 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2746 rx_tail_flags | rx->last_tail);
2747
2748 return count;
2749 }
2750
lan743x_rx_ring_cleanup(struct lan743x_rx * rx)2751 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2752 {
2753 if (rx->buffer_info && rx->ring_cpu_ptr) {
2754 int index;
2755
2756 for (index = 0; index < rx->ring_size; index++)
2757 lan743x_rx_release_ring_element(rx, index);
2758 }
2759
2760 if (rx->head_cpu_ptr) {
2761 dma_free_coherent(&rx->adapter->pdev->dev,
2762 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr,
2763 rx->head_dma_ptr);
2764 rx->head_cpu_ptr = NULL;
2765 rx->head_dma_ptr = 0;
2766 }
2767
2768 kfree(rx->buffer_info);
2769 rx->buffer_info = NULL;
2770
2771 if (rx->ring_cpu_ptr) {
2772 dma_free_coherent(&rx->adapter->pdev->dev,
2773 rx->ring_allocation_size, rx->ring_cpu_ptr,
2774 rx->ring_dma_ptr);
2775 rx->ring_allocation_size = 0;
2776 rx->ring_cpu_ptr = NULL;
2777 rx->ring_dma_ptr = 0;
2778 }
2779
2780 rx->ring_size = 0;
2781 rx->last_head = 0;
2782 }
2783
lan743x_rx_ring_init(struct lan743x_rx * rx)2784 static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2785 {
2786 size_t ring_allocation_size = 0;
2787 dma_addr_t dma_ptr = 0;
2788 void *cpu_ptr = NULL;
2789 int ret = -ENOMEM;
2790 int index = 0;
2791
2792 rx->ring_size = LAN743X_RX_RING_SIZE;
2793 if (rx->ring_size <= 1) {
2794 ret = -EINVAL;
2795 goto cleanup;
2796 }
2797 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2798 ret = -EINVAL;
2799 goto cleanup;
2800 }
2801 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2802 DMA_BIT_MASK(64))) {
2803 dev_warn(&rx->adapter->pdev->dev,
2804 "lan743x_: No suitable DMA available\n");
2805 ret = -ENOMEM;
2806 goto cleanup;
2807 }
2808 ring_allocation_size = ALIGN(rx->ring_size *
2809 sizeof(struct lan743x_rx_descriptor),
2810 PAGE_SIZE);
2811 dma_ptr = 0;
2812 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2813 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2814 if (!cpu_ptr) {
2815 ret = -ENOMEM;
2816 goto cleanup;
2817 }
2818 rx->ring_allocation_size = ring_allocation_size;
2819 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2820 rx->ring_dma_ptr = dma_ptr;
2821
2822 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
2823 GFP_KERNEL);
2824 if (!cpu_ptr) {
2825 ret = -ENOMEM;
2826 goto cleanup;
2827 }
2828 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2829 dma_ptr = 0;
2830 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2831 sizeof(*rx->head_cpu_ptr), &dma_ptr,
2832 GFP_KERNEL);
2833 if (!cpu_ptr) {
2834 ret = -ENOMEM;
2835 goto cleanup;
2836 }
2837
2838 rx->head_cpu_ptr = cpu_ptr;
2839 rx->head_dma_ptr = dma_ptr;
2840 if (rx->head_dma_ptr & 0x3) {
2841 ret = -ENOMEM;
2842 goto cleanup;
2843 }
2844
2845 rx->last_head = 0;
2846 for (index = 0; index < rx->ring_size; index++) {
2847 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL);
2848 if (ret)
2849 goto cleanup;
2850 }
2851 return 0;
2852
2853 cleanup:
2854 netif_warn(rx->adapter, ifup, rx->adapter->netdev,
2855 "Error allocating memory for LAN743x\n");
2856
2857 lan743x_rx_ring_cleanup(rx);
2858 return ret;
2859 }
2860
lan743x_rx_close(struct lan743x_rx * rx)2861 static void lan743x_rx_close(struct lan743x_rx *rx)
2862 {
2863 struct lan743x_adapter *adapter = rx->adapter;
2864
2865 lan743x_csr_write(adapter, FCT_RX_CTL,
2866 FCT_RX_CTL_DIS_(rx->channel_number));
2867 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2868 FCT_RX_CTL_EN_(rx->channel_number),
2869 0, 1000, 20000, 100);
2870
2871 lan743x_csr_write(adapter, DMAC_CMD,
2872 DMAC_CMD_STOP_R_(rx->channel_number));
2873 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2874
2875 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2876 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2877 lan743x_csr_write(adapter, INT_EN_CLR,
2878 INT_BIT_DMA_RX_(rx->channel_number));
2879 napi_disable(&rx->napi);
2880
2881 netif_napi_del(&rx->napi);
2882
2883 lan743x_rx_ring_cleanup(rx);
2884 }
2885
lan743x_rx_open(struct lan743x_rx * rx)2886 static int lan743x_rx_open(struct lan743x_rx *rx)
2887 {
2888 struct lan743x_adapter *adapter = rx->adapter;
2889 u32 data = 0;
2890 int ret;
2891
2892 rx->frame_count = 0;
2893 ret = lan743x_rx_ring_init(rx);
2894 if (ret)
2895 goto return_error;
2896
2897 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll);
2898
2899 lan743x_csr_write(adapter, DMAC_CMD,
2900 DMAC_CMD_RX_SWR_(rx->channel_number));
2901 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2902 DMAC_CMD_RX_SWR_(rx->channel_number),
2903 0, 1000, 20000, 100);
2904
2905 /* set ring base address */
2906 lan743x_csr_write(adapter,
2907 RX_BASE_ADDRH(rx->channel_number),
2908 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2909 lan743x_csr_write(adapter,
2910 RX_BASE_ADDRL(rx->channel_number),
2911 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2912
2913 /* set rx write back address */
2914 lan743x_csr_write(adapter,
2915 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2916 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2917 lan743x_csr_write(adapter,
2918 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2919 DMA_ADDR_LOW32(rx->head_dma_ptr));
2920 data = RX_CFG_A_RX_HP_WB_EN_;
2921 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2922 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2923 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2924 RX_CFG_A_RX_PF_THRES_SET_(16) |
2925 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2926 }
2927
2928 /* set RX_CFG_A */
2929 lan743x_csr_write(adapter,
2930 RX_CFG_A(rx->channel_number), data);
2931
2932 /* set RX_CFG_B */
2933 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2934 data &= ~RX_CFG_B_RX_PAD_MASK_;
2935 if (!RX_HEAD_PADDING)
2936 data |= RX_CFG_B_RX_PAD_0_;
2937 else
2938 data |= RX_CFG_B_RX_PAD_2_;
2939 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2940 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2941 data |= RX_CFG_B_TS_ALL_RX_;
2942 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2943 data |= RX_CFG_B_RDMABL_512_;
2944
2945 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2946 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2947 INT_BIT_DMA_RX_
2948 (rx->channel_number));
2949
2950 /* set RX_CFG_C */
2951 data = 0;
2952 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2953 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2954 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2955 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2956 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2957 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2958 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2959 data |= RX_CFG_C_RX_INT_EN_R2C_;
2960 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2961
2962 rx->last_tail = ((u32)(rx->ring_size - 1));
2963 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2964 rx->last_tail);
2965 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2966 if (rx->last_head) {
2967 ret = -EIO;
2968 goto napi_delete;
2969 }
2970
2971 napi_enable(&rx->napi);
2972
2973 lan743x_csr_write(adapter, INT_EN_SET,
2974 INT_BIT_DMA_RX_(rx->channel_number));
2975 lan743x_csr_write(adapter, DMAC_INT_STS,
2976 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2977 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2978 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2979 lan743x_csr_write(adapter, DMAC_CMD,
2980 DMAC_CMD_START_R_(rx->channel_number));
2981
2982 /* initialize fifo */
2983 lan743x_csr_write(adapter, FCT_RX_CTL,
2984 FCT_RX_CTL_RESET_(rx->channel_number));
2985 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2986 FCT_RX_CTL_RESET_(rx->channel_number),
2987 0, 1000, 20000, 100);
2988 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2989 FCT_FLOW_CTL_REQ_EN_ |
2990 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2991 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2992
2993 /* enable fifo */
2994 lan743x_csr_write(adapter, FCT_RX_CTL,
2995 FCT_RX_CTL_EN_(rx->channel_number));
2996 return 0;
2997
2998 napi_delete:
2999 netif_napi_del(&rx->napi);
3000 lan743x_rx_ring_cleanup(rx);
3001
3002 return_error:
3003 return ret;
3004 }
3005
lan743x_netdev_close(struct net_device * netdev)3006 static int lan743x_netdev_close(struct net_device *netdev)
3007 {
3008 struct lan743x_adapter *adapter = netdev_priv(netdev);
3009 int index;
3010
3011 for (index = 0; index < adapter->used_tx_channels; index++)
3012 lan743x_tx_close(&adapter->tx[index]);
3013
3014 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
3015 lan743x_rx_close(&adapter->rx[index]);
3016
3017 lan743x_ptp_close(adapter);
3018
3019 lan743x_phy_close(adapter);
3020
3021 lan743x_mac_close(adapter);
3022
3023 lan743x_intr_close(adapter);
3024
3025 return 0;
3026 }
3027
lan743x_netdev_open(struct net_device * netdev)3028 static int lan743x_netdev_open(struct net_device *netdev)
3029 {
3030 struct lan743x_adapter *adapter = netdev_priv(netdev);
3031 int index;
3032 int ret;
3033
3034 ret = lan743x_intr_open(adapter);
3035 if (ret)
3036 goto return_error;
3037
3038 ret = lan743x_mac_open(adapter);
3039 if (ret)
3040 goto close_intr;
3041
3042 ret = lan743x_phy_open(adapter);
3043 if (ret)
3044 goto close_mac;
3045
3046 ret = lan743x_ptp_open(adapter);
3047 if (ret)
3048 goto close_phy;
3049
3050 lan743x_rfe_open(adapter);
3051
3052 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3053 ret = lan743x_rx_open(&adapter->rx[index]);
3054 if (ret)
3055 goto close_rx;
3056 }
3057
3058 for (index = 0; index < adapter->used_tx_channels; index++) {
3059 ret = lan743x_tx_open(&adapter->tx[index]);
3060 if (ret)
3061 goto close_tx;
3062 }
3063 return 0;
3064
3065 close_tx:
3066 for (index = 0; index < adapter->used_tx_channels; index++) {
3067 if (adapter->tx[index].ring_cpu_ptr)
3068 lan743x_tx_close(&adapter->tx[index]);
3069 }
3070
3071 close_rx:
3072 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3073 if (adapter->rx[index].ring_cpu_ptr)
3074 lan743x_rx_close(&adapter->rx[index]);
3075 }
3076 lan743x_ptp_close(adapter);
3077
3078 close_phy:
3079 lan743x_phy_close(adapter);
3080
3081 close_mac:
3082 lan743x_mac_close(adapter);
3083
3084 close_intr:
3085 lan743x_intr_close(adapter);
3086
3087 return_error:
3088 netif_warn(adapter, ifup, adapter->netdev,
3089 "Error opening LAN743x\n");
3090 return ret;
3091 }
3092
lan743x_netdev_xmit_frame(struct sk_buff * skb,struct net_device * netdev)3093 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
3094 struct net_device *netdev)
3095 {
3096 struct lan743x_adapter *adapter = netdev_priv(netdev);
3097 u8 ch = 0;
3098
3099 if (adapter->is_pci11x1x)
3100 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS;
3101
3102 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb);
3103 }
3104
lan743x_netdev_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)3105 static int lan743x_netdev_ioctl(struct net_device *netdev,
3106 struct ifreq *ifr, int cmd)
3107 {
3108 if (!netif_running(netdev))
3109 return -EINVAL;
3110 if (cmd == SIOCSHWTSTAMP)
3111 return lan743x_ptp_ioctl(netdev, ifr, cmd);
3112 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
3113 }
3114
lan743x_netdev_set_multicast(struct net_device * netdev)3115 static void lan743x_netdev_set_multicast(struct net_device *netdev)
3116 {
3117 struct lan743x_adapter *adapter = netdev_priv(netdev);
3118
3119 lan743x_rfe_set_multicast(adapter);
3120 }
3121
lan743x_netdev_change_mtu(struct net_device * netdev,int new_mtu)3122 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3123 {
3124 struct lan743x_adapter *adapter = netdev_priv(netdev);
3125 int ret = 0;
3126
3127 ret = lan743x_mac_set_mtu(adapter, new_mtu);
3128 if (!ret)
3129 netdev->mtu = new_mtu;
3130 return ret;
3131 }
3132
lan743x_netdev_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)3133 static void lan743x_netdev_get_stats64(struct net_device *netdev,
3134 struct rtnl_link_stats64 *stats)
3135 {
3136 struct lan743x_adapter *adapter = netdev_priv(netdev);
3137
3138 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
3139 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
3140 stats->rx_bytes = lan743x_csr_read(adapter,
3141 STAT_RX_UNICAST_BYTE_COUNT) +
3142 lan743x_csr_read(adapter,
3143 STAT_RX_BROADCAST_BYTE_COUNT) +
3144 lan743x_csr_read(adapter,
3145 STAT_RX_MULTICAST_BYTE_COUNT);
3146 stats->tx_bytes = lan743x_csr_read(adapter,
3147 STAT_TX_UNICAST_BYTE_COUNT) +
3148 lan743x_csr_read(adapter,
3149 STAT_TX_BROADCAST_BYTE_COUNT) +
3150 lan743x_csr_read(adapter,
3151 STAT_TX_MULTICAST_BYTE_COUNT);
3152 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
3153 lan743x_csr_read(adapter,
3154 STAT_RX_ALIGNMENT_ERRORS) +
3155 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
3156 lan743x_csr_read(adapter,
3157 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
3158 lan743x_csr_read(adapter,
3159 STAT_RX_OVERSIZE_FRAME_ERRORS);
3160 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
3161 lan743x_csr_read(adapter,
3162 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
3163 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
3164 stats->rx_dropped = lan743x_csr_read(adapter,
3165 STAT_RX_DROPPED_FRAMES);
3166 stats->tx_dropped = lan743x_csr_read(adapter,
3167 STAT_TX_EXCESSIVE_COLLISION);
3168 stats->multicast = lan743x_csr_read(adapter,
3169 STAT_RX_MULTICAST_FRAMES) +
3170 lan743x_csr_read(adapter,
3171 STAT_TX_MULTICAST_FRAMES);
3172 stats->collisions = lan743x_csr_read(adapter,
3173 STAT_TX_SINGLE_COLLISIONS) +
3174 lan743x_csr_read(adapter,
3175 STAT_TX_MULTIPLE_COLLISIONS) +
3176 lan743x_csr_read(adapter,
3177 STAT_TX_LATE_COLLISIONS);
3178 }
3179
lan743x_netdev_set_mac_address(struct net_device * netdev,void * addr)3180 static int lan743x_netdev_set_mac_address(struct net_device *netdev,
3181 void *addr)
3182 {
3183 struct lan743x_adapter *adapter = netdev_priv(netdev);
3184 struct sockaddr *sock_addr = addr;
3185 int ret;
3186
3187 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
3188 if (ret)
3189 return ret;
3190 eth_hw_addr_set(netdev, sock_addr->sa_data);
3191 lan743x_mac_set_address(adapter, sock_addr->sa_data);
3192 lan743x_rfe_update_mac_address(adapter);
3193 return 0;
3194 }
3195
3196 static const struct net_device_ops lan743x_netdev_ops = {
3197 .ndo_open = lan743x_netdev_open,
3198 .ndo_stop = lan743x_netdev_close,
3199 .ndo_start_xmit = lan743x_netdev_xmit_frame,
3200 .ndo_eth_ioctl = lan743x_netdev_ioctl,
3201 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
3202 .ndo_change_mtu = lan743x_netdev_change_mtu,
3203 .ndo_get_stats64 = lan743x_netdev_get_stats64,
3204 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
3205 };
3206
lan743x_hardware_cleanup(struct lan743x_adapter * adapter)3207 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
3208 {
3209 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3210 }
3211
lan743x_mdiobus_cleanup(struct lan743x_adapter * adapter)3212 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
3213 {
3214 mdiobus_unregister(adapter->mdiobus);
3215 }
3216
lan743x_full_cleanup(struct lan743x_adapter * adapter)3217 static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
3218 {
3219 unregister_netdev(adapter->netdev);
3220
3221 lan743x_mdiobus_cleanup(adapter);
3222 lan743x_hardware_cleanup(adapter);
3223 lan743x_pci_cleanup(adapter);
3224 }
3225
lan743x_hardware_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)3226 static int lan743x_hardware_init(struct lan743x_adapter *adapter,
3227 struct pci_dev *pdev)
3228 {
3229 struct lan743x_tx *tx;
3230 int index;
3231 int ret;
3232
3233 adapter->is_pci11x1x = is_pci11x1x_chip(adapter);
3234 if (adapter->is_pci11x1x) {
3235 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS;
3236 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS;
3237 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT;
3238 pci11x1x_strap_get_status(adapter);
3239 spin_lock_init(&adapter->eth_syslock_spinlock);
3240 mutex_init(&adapter->sgmii_rw_lock);
3241 } else {
3242 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
3243 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
3244 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT;
3245 }
3246
3247 adapter->intr.irq = adapter->pdev->irq;
3248 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3249
3250 ret = lan743x_gpio_init(adapter);
3251 if (ret)
3252 return ret;
3253
3254 ret = lan743x_mac_init(adapter);
3255 if (ret)
3256 return ret;
3257
3258 ret = lan743x_phy_init(adapter);
3259 if (ret)
3260 return ret;
3261
3262 ret = lan743x_ptp_init(adapter);
3263 if (ret)
3264 return ret;
3265
3266 lan743x_rfe_update_mac_address(adapter);
3267
3268 ret = lan743x_dmac_init(adapter);
3269 if (ret)
3270 return ret;
3271
3272 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3273 adapter->rx[index].adapter = adapter;
3274 adapter->rx[index].channel_number = index;
3275 }
3276
3277 for (index = 0; index < adapter->used_tx_channels; index++) {
3278 tx = &adapter->tx[index];
3279 tx->adapter = adapter;
3280 tx->channel_number = index;
3281 spin_lock_init(&tx->ring_lock);
3282 }
3283
3284 return 0;
3285 }
3286
lan743x_mdiobus_init(struct lan743x_adapter * adapter)3287 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
3288 {
3289 u32 sgmii_ctl;
3290 int ret;
3291
3292 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
3293 if (!(adapter->mdiobus)) {
3294 ret = -ENOMEM;
3295 goto return_error;
3296 }
3297
3298 adapter->mdiobus->priv = (void *)adapter;
3299 if (adapter->is_pci11x1x) {
3300 if (adapter->is_sgmii_en) {
3301 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3302 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;
3303 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_;
3304 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3305 netif_dbg(adapter, drv, adapter->netdev,
3306 "SGMII operation\n");
3307 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3308 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3309 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45;
3310 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45;
3311 adapter->mdiobus->name = "lan743x-mdiobus-c45";
3312 netif_dbg(adapter, drv, adapter->netdev,
3313 "lan743x-mdiobus-c45\n");
3314 } else {
3315 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3316 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_;
3317 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;
3318 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3319 netif_dbg(adapter, drv, adapter->netdev,
3320 "RGMII operation\n");
3321 // Only C22 support when RGMII I/F
3322 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3323 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3324 adapter->mdiobus->name = "lan743x-mdiobus";
3325 netif_dbg(adapter, drv, adapter->netdev,
3326 "lan743x-mdiobus\n");
3327 }
3328 } else {
3329 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3330 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3331 adapter->mdiobus->name = "lan743x-mdiobus";
3332 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n");
3333 }
3334
3335 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
3336 "pci-%s", pci_name(adapter->pdev));
3337
3338 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
3339 /* LAN7430 uses internal phy at address 1 */
3340 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
3341
3342 /* register mdiobus */
3343 ret = mdiobus_register(adapter->mdiobus);
3344 if (ret < 0)
3345 goto return_error;
3346 return 0;
3347
3348 return_error:
3349 return ret;
3350 }
3351
3352 /* lan743x_pcidev_probe - Device Initialization Routine
3353 * @pdev: PCI device information struct
3354 * @id: entry in lan743x_pci_tbl
3355 *
3356 * Returns 0 on success, negative on failure
3357 *
3358 * initializes an adapter identified by a pci_dev structure.
3359 * The OS initialization, configuring of the adapter private structure,
3360 * and a hardware reset occur.
3361 **/
lan743x_pcidev_probe(struct pci_dev * pdev,const struct pci_device_id * id)3362 static int lan743x_pcidev_probe(struct pci_dev *pdev,
3363 const struct pci_device_id *id)
3364 {
3365 struct lan743x_adapter *adapter = NULL;
3366 struct net_device *netdev = NULL;
3367 int ret = -ENODEV;
3368
3369 if (id->device == PCI_DEVICE_ID_SMSC_A011 ||
3370 id->device == PCI_DEVICE_ID_SMSC_A041) {
3371 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3372 sizeof(struct lan743x_adapter),
3373 PCI11X1X_USED_TX_CHANNELS,
3374 LAN743X_USED_RX_CHANNELS);
3375 } else {
3376 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3377 sizeof(struct lan743x_adapter),
3378 LAN743X_USED_TX_CHANNELS,
3379 LAN743X_USED_RX_CHANNELS);
3380 }
3381
3382 if (!netdev)
3383 goto return_error;
3384
3385 SET_NETDEV_DEV(netdev, &pdev->dev);
3386 pci_set_drvdata(pdev, netdev);
3387 adapter = netdev_priv(netdev);
3388 adapter->netdev = netdev;
3389 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
3390 NETIF_MSG_LINK | NETIF_MSG_IFUP |
3391 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
3392 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
3393
3394 of_get_mac_address(pdev->dev.of_node, adapter->mac_address);
3395
3396 ret = lan743x_pci_init(adapter, pdev);
3397 if (ret)
3398 goto return_error;
3399
3400 ret = lan743x_csr_init(adapter);
3401 if (ret)
3402 goto cleanup_pci;
3403
3404 ret = lan743x_hardware_init(adapter, pdev);
3405 if (ret)
3406 goto cleanup_pci;
3407
3408 ret = lan743x_mdiobus_init(adapter);
3409 if (ret)
3410 goto cleanup_hardware;
3411
3412 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
3413 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
3414 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO |
3415 NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
3416 adapter->netdev->hw_features = adapter->netdev->features;
3417
3418 /* carrier off reporting is important to ethtool even BEFORE open */
3419 netif_carrier_off(netdev);
3420
3421 ret = register_netdev(adapter->netdev);
3422 if (ret < 0)
3423 goto cleanup_mdiobus;
3424 return 0;
3425
3426 cleanup_mdiobus:
3427 lan743x_mdiobus_cleanup(adapter);
3428
3429 cleanup_hardware:
3430 lan743x_hardware_cleanup(adapter);
3431
3432 cleanup_pci:
3433 lan743x_pci_cleanup(adapter);
3434
3435 return_error:
3436 pr_warn("Initialization failed\n");
3437 return ret;
3438 }
3439
3440 /**
3441 * lan743x_pcidev_remove - Device Removal Routine
3442 * @pdev: PCI device information struct
3443 *
3444 * this is called by the PCI subsystem to alert the driver
3445 * that it should release a PCI device. This could be caused by a
3446 * Hot-Plug event, or because the driver is going to be removed from
3447 * memory.
3448 **/
lan743x_pcidev_remove(struct pci_dev * pdev)3449 static void lan743x_pcidev_remove(struct pci_dev *pdev)
3450 {
3451 struct net_device *netdev = pci_get_drvdata(pdev);
3452 struct lan743x_adapter *adapter = netdev_priv(netdev);
3453
3454 lan743x_full_cleanup(adapter);
3455 }
3456
lan743x_pcidev_shutdown(struct pci_dev * pdev)3457 static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
3458 {
3459 struct net_device *netdev = pci_get_drvdata(pdev);
3460 struct lan743x_adapter *adapter = netdev_priv(netdev);
3461
3462 rtnl_lock();
3463 netif_device_detach(netdev);
3464
3465 /* close netdev when netdev is at running state.
3466 * For instance, it is true when system goes to sleep by pm-suspend
3467 * However, it is false when system goes to sleep by suspend GUI menu
3468 */
3469 if (netif_running(netdev))
3470 lan743x_netdev_close(netdev);
3471 rtnl_unlock();
3472
3473 #ifdef CONFIG_PM
3474 pci_save_state(pdev);
3475 #endif
3476
3477 /* clean up lan743x portion */
3478 lan743x_hardware_cleanup(adapter);
3479 }
3480
3481 #ifdef CONFIG_PM_SLEEP
lan743x_pm_wakeframe_crc16(const u8 * buf,int len)3482 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
3483 {
3484 return bitrev16(crc16(0xFFFF, buf, len));
3485 }
3486
lan743x_pm_set_wol(struct lan743x_adapter * adapter)3487 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
3488 {
3489 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3490 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3491 const u8 arp_type[2] = { 0x08, 0x06 };
3492 int mask_index;
3493 u32 sopass;
3494 u32 pmtctl;
3495 u32 wucsr;
3496 u32 macrx;
3497 u16 crc;
3498
3499 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
3500 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
3501
3502 /* clear wake settings */
3503 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
3504 pmtctl |= PMT_CTL_WUPS_MASK_;
3505 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
3506 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
3507 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
3508
3509 macrx = lan743x_csr_read(adapter, MAC_RX);
3510
3511 wucsr = 0;
3512 mask_index = 0;
3513
3514 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
3515
3516 if (adapter->wolopts & WAKE_PHY) {
3517 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
3518 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
3519 }
3520 if (adapter->wolopts & WAKE_MAGIC) {
3521 wucsr |= MAC_WUCSR_MPEN_;
3522 macrx |= MAC_RX_RXEN_;
3523 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3524 }
3525 if (adapter->wolopts & WAKE_UCAST) {
3526 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
3527 macrx |= MAC_RX_RXEN_;
3528 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3529 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3530 }
3531 if (adapter->wolopts & WAKE_BCAST) {
3532 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
3533 macrx |= MAC_RX_RXEN_;
3534 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3535 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3536 }
3537 if (adapter->wolopts & WAKE_MCAST) {
3538 /* IPv4 multicast */
3539 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
3540 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3541 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3542 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3543 (crc & MAC_WUF_CFG_CRC16_MASK_));
3544 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
3545 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3546 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3547 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3548 mask_index++;
3549
3550 /* IPv6 multicast */
3551 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
3552 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3553 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3554 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3555 (crc & MAC_WUF_CFG_CRC16_MASK_));
3556 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
3557 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3558 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3559 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3560 mask_index++;
3561
3562 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3563 macrx |= MAC_RX_RXEN_;
3564 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3565 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3566 }
3567 if (adapter->wolopts & WAKE_ARP) {
3568 /* set MAC_WUF_CFG & WUF_MASK
3569 * for packettype (offset 12,13) = ARP (0x0806)
3570 */
3571 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
3572 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3573 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
3574 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3575 (crc & MAC_WUF_CFG_CRC16_MASK_));
3576 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
3577 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3578 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3579 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3580 mask_index++;
3581
3582 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3583 macrx |= MAC_RX_RXEN_;
3584 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3585 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3586 }
3587
3588 if (adapter->wolopts & WAKE_MAGICSECURE) {
3589 sopass = *(u32 *)adapter->sopass;
3590 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass);
3591 sopass = *(u16 *)&adapter->sopass[4];
3592 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass);
3593 wucsr |= MAC_MP_SO_EN_;
3594 }
3595
3596 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
3597 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
3598 lan743x_csr_write(adapter, MAC_RX, macrx);
3599 }
3600
lan743x_pm_suspend(struct device * dev)3601 static int lan743x_pm_suspend(struct device *dev)
3602 {
3603 struct pci_dev *pdev = to_pci_dev(dev);
3604 struct net_device *netdev = pci_get_drvdata(pdev);
3605 struct lan743x_adapter *adapter = netdev_priv(netdev);
3606 u32 data;
3607
3608 lan743x_pcidev_shutdown(pdev);
3609
3610 /* clear all wakes */
3611 lan743x_csr_write(adapter, MAC_WUCSR, 0);
3612 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3613 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3614
3615 if (adapter->wolopts)
3616 lan743x_pm_set_wol(adapter);
3617
3618 if (adapter->is_pci11x1x) {
3619 /* Save HW_CFG to config again in PM resume */
3620 data = lan743x_csr_read(adapter, HW_CFG);
3621 adapter->hw_cfg = data;
3622 data |= (HW_CFG_RST_PROTECT_PCIE_ |
3623 HW_CFG_D3_RESET_DIS_ |
3624 HW_CFG_D3_VAUX_OVR_ |
3625 HW_CFG_HOT_RESET_DIS_ |
3626 HW_CFG_RST_PROTECT_);
3627 lan743x_csr_write(adapter, HW_CFG, data);
3628 }
3629
3630 /* Host sets PME_En, put D3hot */
3631 return pci_prepare_to_sleep(pdev);
3632 }
3633
lan743x_pm_resume(struct device * dev)3634 static int lan743x_pm_resume(struct device *dev)
3635 {
3636 struct pci_dev *pdev = to_pci_dev(dev);
3637 struct net_device *netdev = pci_get_drvdata(pdev);
3638 struct lan743x_adapter *adapter = netdev_priv(netdev);
3639 int ret;
3640
3641 pci_set_power_state(pdev, PCI_D0);
3642 pci_restore_state(pdev);
3643 pci_save_state(pdev);
3644
3645 /* Restore HW_CFG that was saved during pm suspend */
3646 if (adapter->is_pci11x1x)
3647 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg);
3648
3649 ret = lan743x_hardware_init(adapter, pdev);
3650 if (ret) {
3651 netif_err(adapter, probe, adapter->netdev,
3652 "lan743x_hardware_init returned %d\n", ret);
3653 lan743x_pci_cleanup(adapter);
3654 return ret;
3655 }
3656
3657 /* open netdev when netdev is at running state while resume.
3658 * For instance, it is true when system wakesup after pm-suspend
3659 * However, it is false when system wakes up after suspend GUI menu
3660 */
3661 if (netif_running(netdev))
3662 lan743x_netdev_open(netdev);
3663
3664 netif_device_attach(netdev);
3665 ret = lan743x_csr_read(adapter, MAC_WK_SRC);
3666 netif_info(adapter, drv, adapter->netdev,
3667 "Wakeup source : 0x%08X\n", ret);
3668
3669 return 0;
3670 }
3671
3672 static const struct dev_pm_ops lan743x_pm_ops = {
3673 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3674 };
3675 #endif /* CONFIG_PM_SLEEP */
3676
3677 static const struct pci_device_id lan743x_pcidev_tbl[] = {
3678 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
3679 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
3680 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) },
3681 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) },
3682 { 0, }
3683 };
3684
3685 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl);
3686
3687 static struct pci_driver lan743x_pcidev_driver = {
3688 .name = DRIVER_NAME,
3689 .id_table = lan743x_pcidev_tbl,
3690 .probe = lan743x_pcidev_probe,
3691 .remove = lan743x_pcidev_remove,
3692 #ifdef CONFIG_PM_SLEEP
3693 .driver.pm = &lan743x_pm_ops,
3694 #endif
3695 .shutdown = lan743x_pcidev_shutdown,
3696 };
3697
3698 module_pci_driver(lan743x_pcidev_driver);
3699
3700 MODULE_AUTHOR(DRIVER_AUTHOR);
3701 MODULE_DESCRIPTION(DRIVER_DESC);
3702 MODULE_LICENSE("GPL");
3703
