/Linux-v6.6/tools/testing/selftests/powerpc/mm/ |
D | large_vm_gpr_corruption.c | 54 #define CHECK_REG(_reg) \ argument
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/Linux-v6.6/drivers/clk/sunxi-ng/ |
D | ccu_nkmp.h | 35 #define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
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D | ccu_mult.h | 45 #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
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/Linux-v6.6/drivers/clk/mediatek/ |
D | clk-mt8188-apmixedsys.c | 32 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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D | clk-mt6779.c | 1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument 1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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D | clk-mt8186-apmixedsys.c | 19 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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D | clk-mt6795-apmixedsys.c | 26 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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D | clk-mt8195-apmixedsys.c | 33 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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D | clk-mt6765.c | 671 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument 695 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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/Linux-v6.6/drivers/gpu/drm/msm/adreno/ |
D | a6xx_gpu_state.h | 55 #define CLUSTER(_id, _reg, _sel_reg, _sel_val) \ argument 129 #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ argument
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/Linux-v6.6/include/linux/mfd/ |
D | max77650.h | 52 #define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK) argument
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/Linux-v6.6/arch/sh/kernel/cpu/sh2a/ |
D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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/Linux-v6.6/sound/soc/codecs/ |
D | adau1373.c | 596 #define DECLARE_ADAU1373_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument 641 #define DECLARE_ADAU1373_DSP_CHANNEL_MIXER_CTRLS(_name, _reg) \ argument 663 #define DECLARE_ADAU1373_DSP_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument
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/Linux-v6.6/drivers/mfd/ |
D | rc5t583.c | 30 #define DEEPSLEEP_INIT(_id, _reg, _pos) \ argument
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/Linux-v6.6/drivers/regulator/ |
D | max8998.c | 131 int *_reg, int *_shift, int *_mask) in max8998_get_voltage_register() 490 #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \ argument
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D | mc13783-regulator.c | 243 #define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \ argument 245 #define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \ argument
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D | max77650-regulator.c | 16 #define MAX77650_REGULATOR_EN_CTRL_BITS(_reg) \ argument
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/Linux-v6.6/drivers/clk/ |
D | clk-k210.c | 49 #define K210_GATE(_reg, _bit) \ argument 53 #define K210_DIV(_reg, _shift, _width, _type) \ argument 59 #define K210_MUX(_reg, _bit) \ argument
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/Linux-v6.6/drivers/net/wireless/ath/ath5k/ |
D | ath5k.h | 124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ argument 128 #define AR5K_REG_MASKED_BITS(ah, _reg, _flags, _mask) \ argument 132 #define AR5K_REG_ENABLE_BITS(ah, _reg, _flags) \ argument 135 #define AR5K_REG_DISABLE_BITS(ah, _reg, _flags) \ argument 139 #define AR5K_REG_READ_Q(ah, _reg, _queue) \ argument 142 #define AR5K_REG_WRITE_Q(ah, _reg, _queue) \ argument 145 #define AR5K_Q_ENABLE_BITS(_reg, _queue) do { \ argument 149 #define AR5K_Q_DISABLE_BITS(_reg, _queue) do { \ argument
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/Linux-v6.6/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7724.c | 150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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/Linux-v6.6/drivers/clk/nxp/ |
D | clk-lpc32xx.c | 1093 #define LPC32XX_DEFINE_PLL(_idx, _name, _reg, _enable) \ argument 1109 #define LPC32XX_DEFINE_MUX(_idx, _reg, _shift, _mask, _table, _flags) \ argument 1130 #define LPC32XX_DEFINE_DIV(_idx, _reg, _shift, _width, _table, _flags) \ argument 1149 #define LPC32XX_DEFINE_GATE(_idx, _reg, _bit, _flags) \ argument 1166 #define LPC32XX_DEFINE_CLK(_idx, _reg, _e, _em, _d, _dm, _b, _bm, _ops) \ argument
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/Linux-v6.6/drivers/iio/adc/ |
D | axp20x_adc.c | 44 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ argument 55 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ argument
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