/Linux-v6.6/sound/soc/mediatek/mt8195/ |
D | mt8195-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument 38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
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/Linux-v6.6/sound/soc/mediatek/mt8188/ |
D | mt8188-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument 38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
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/Linux-v6.6/drivers/gpu/drm/i915/ |
D | i915_cmd_parser.c | 581 #define REG32(_reg, ...) \ argument 584 #define REG32_IDX(_reg, idx) \ argument 594 #define REG64(_reg) \ argument 598 #define REG64_IDX(_reg, idx) \ argument 602 #define REG64_BASE_IDX(_reg, base, idx) \ argument
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/Linux-v6.6/drivers/clk/mediatek/ |
D | clk-mt8192-apmixedsys.c | 35 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument 63 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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D | clk-mt8195-apusys_pll.c | 28 #define PLL(_id, _name, _reg, _pwr_reg, _pd_reg, _pcw_reg) { \ argument
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D | clk-mt8135-apmixedsys.c | 20 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
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D | clk-mt7629.c | 23 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument 44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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D | clk-mt6797.c | 593 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument 613 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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/Linux-v6.6/drivers/gpu/drm/i915/gvt/ |
D | reg.h | 79 #define REG_50080_TO_PIPE(_reg) ({ \ argument 86 #define REG_50080_TO_PLANE(_reg) ({ \ argument
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/Linux-v6.6/drivers/clk/sunxi-ng/ |
D | ccu_phase.h | 20 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ argument
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D | ccu_sdm.h | 42 _reg, _reg_enable) \ argument
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D | ccu_nk.h | 33 #define SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(_struct, _name, _parent, _reg, \ argument
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/Linux-v6.6/drivers/net/wireless/ath/ |
D | hw.c | 24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
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/Linux-v6.6/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument 128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument 125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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/Linux-v6.6/drivers/reset/ |
D | reset-uniphier.c | 27 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument 34 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
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/Linux-v6.6/drivers/clk/mvebu/ |
D | armada-37xx-periph.c | 159 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument 169 #define PERIPH_PM_CPU(_name, _shift1, _reg, _shift2) \ argument 186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument 191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
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/Linux-v6.6/drivers/irqchip/ |
D | irq-madera.c | 22 #define MADERA_IRQ(_irq, _reg) \ argument
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/Linux-v6.6/arch/powerpc/kernel/ptrace/ |
D | ptrace.c | 386 #define CHECK_REG(_pt, _reg) \ in pt_regs_check() argument
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/Linux-v6.6/drivers/media/i2c/ccs/ |
D | ccs-quirk.h | 61 #define CCS_MK_QUIRK_REG_8(_reg, _val) \ argument
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/Linux-v6.6/drivers/gpu/drm/msm/adreno/ |
D | adreno_gpu.h | 503 #define PKT4(_reg, _cnt) \ argument 544 #define ADRENO_PROTECT_RW(_reg, _len) \ argument 553 #define ADRENO_PROTECT_RDONLY(_reg, _len) \ argument
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/Linux-v6.6/drivers/clk/meson/ |
D | g12a-aoclk.c | 46 #define AXG_AO_GATE(_name, _reg, _bit) \ argument
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/Linux-v6.6/drivers/media/tuners/ |
D | mc44s803_priv.h | 179 #define MC44S803_REG_SM(_val, _reg) \ argument 183 #define MC44S803_REG_MS(_val, _reg) \ argument
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/Linux-v6.6/drivers/misc/ |
D | ad525x_dpot.c | 500 #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \ argument 507 #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \ argument
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/Linux-v6.6/include/linux/soc/mediatek/ |
D | mtk_wed.h | 227 #define mtk_wed_device_reg_read(_dev, _reg) \ argument 229 #define mtk_wed_device_reg_write(_dev, _reg, _val) \ argument 254 #define mtk_wed_device_reg_read(_dev, _reg) 0 argument 255 #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0) argument
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