/Linux-v6.6/drivers/clk/mediatek/ |
D | clk-mt2712-mm.c | 33 #define GATE_MM0(_id, _name, _parent, _shift) \ argument 36 #define GATE_MM1(_id, _name, _parent, _shift) \ argument 39 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8188-vpp0.c | 32 #define GATE_VPP0_0(_id, _name, _parent, _shift) \ argument 35 #define GATE_VPP0_1(_id, _name, _parent, _shift) \ argument 38 #define GATE_VPP0_2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8192-mm.c | 32 #define GATE_MM0(_id, _name, _parent, _shift) \ argument 35 #define GATE_MM1(_id, _name, _parent, _shift) \ argument 38 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8192-vdec.c | 33 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument 36 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument 39 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8188-vdec.c | 32 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument 35 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument 38 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8188-wpe.c | 34 #define GATE_WPE_TOP(_id, _name, _parent, _shift) \ argument 37 #define GATE_WPE_VPP0_0(_id, _name, _parent, _shift) \ argument 40 #define GATE_WPE_VPP0_1(_id, _name, _parent, _shift) \ argument
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D | clk-mt7986-eth.c | 23 #define GATE_SGMII0(_id, _name, _parent, _shift) \ argument 39 #define GATE_SGMII1(_id, _name, _parent, _shift) \ argument 55 #define GATE_ETH(_id, _name, _parent, _shift) \ argument
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D | clk-mt8195-vdec.c | 31 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument 34 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument 37 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8195-wpe.c | 31 #define GATE_WPE(_id, _name, _parent, _shift) \ argument 34 #define GATE_WPE_VPP0(_id, _name, _parent, _shift) \ argument 37 #define GATE_WPE_VPP1(_id, _name, _parent, _shift) \ argument
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D | clk-mt7981-eth.c | 25 #define GATE_SGMII0(_id, _name, _parent, _shift) { \ argument 47 #define GATE_SGMII1(_id, _name, _parent, _shift) { \ argument 69 #define GATE_ETH(_id, _name, _parent, _shift) { \ argument
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D | clk-mt8192-aud.c | 33 #define GATE_AUD0(_id, _name, _parent, _shift) \ argument 36 #define GATE_AUD1(_id, _name, _parent, _shift) \ argument 39 #define GATE_AUD2(_id, _name, _parent, _shift) \ argument
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D | clk-mt7986-infracfg.c | 88 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument 91 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument 94 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
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D | clk-mt2712.c | 815 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument 818 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument 843 #define GATE_INFRA(_id, _name, _parent, _shift) \ argument 874 #define GATE_PERI0(_id, _name, _parent, _shift) \ argument 877 #define GATE_PERI1(_id, _name, _parent, _shift) \ argument 880 #define GATE_PERI2(_id, _name, _parent, _shift) \ argument
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D | clk-mt7981-infracfg.c | 101 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument 108 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument 115 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
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D | clk-mt8135.c | 405 #define GATE_ICG(_id, _name, _parent, _shift) \ argument 408 #define GATE_ICG_AO(_id, _name, _parent, _shift) \ argument 441 #define GATE_PERI0(_id, _name, _parent, _shift) \ argument 444 #define GATE_PERI1(_id, _name, _parent, _shift) \ argument
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D | clk-mt6765.c | 488 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument 491 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument 494 #define GATE_TOP2(_id, _name, _parent, _shift) \ argument 546 #define GATE_IFR2(_id, _name, _parent, _shift) \ argument 549 #define GATE_IFR3(_id, _name, _parent, _shift) \ argument 552 #define GATE_IFR4(_id, _name, _parent, _shift) \ argument 555 #define GATE_IFR5(_id, _name, _parent, _shift) \ argument 637 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
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D | clk-mt6779.c | 867 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument 870 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument 873 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument 876 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument 1106 #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 1110 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
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D | clk-mt6797.c | 422 #define GATE_ICG0(_id, _name, _parent, _shift) \ argument 425 #define GATE_ICG1(_id, _name, _parent, _shift) \ argument 428 #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) \ argument 432 #define GATE_ICG2(_id, _name, _parent, _shift) \ argument 435 #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
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/Linux-v6.6/drivers/clk/sunxi-ng/ |
D | ccu_nm.h | 38 #define SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(_struct, _name, _parent, _reg, \ argument 61 #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(_struct, _name, _parent, _reg, \ argument 85 #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \ argument 112 _parent, _reg, \ argument 142 _parent, _reg, \ argument 162 _parent, _reg, \ argument 182 #define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
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/Linux-v6.6/drivers/clk/starfive/ |
D | clk-starfive-jh71x0.h | 32 #define JH71X0_GATE(_idx, _name, _flags, _parent) \ argument 40 #define JH71X0__DIV(_idx, _name, _max, _parent) \ argument 48 #define JH71X0_GDIV(_idx, _name, _flags, _max, _parent) \ argument 56 #define JH71X0_FDIV(_idx, _name, _parent) \ argument 98 #define JH71X0__INV(_idx, _name, _parent) \ argument
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/Linux-v6.6/drivers/clk/sprd/ |
D | pll.h | 64 #define SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, \ argument 85 #define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg, \ argument 92 #define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg, \ argument 99 #define SPRD_PLL_WITH_ITABLE_1K(_struct, _name, _parent, _reg, \ argument 105 #define SPRD_PLL_FW_NAME(_struct, _name, _parent, _reg, _regs_num, \ argument 112 #define SPRD_PLL_HW(_struct, _name, _parent, _reg, _regs_num, _itable, \ argument
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D | div.h | 38 #define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ argument 50 #define SPRD_DIV_CLK(_struct, _name, _parent, _reg, \ argument 55 #define SPRD_DIV_CLK_HW(_struct, _name, _parent, _reg, \ argument
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/Linux-v6.6/drivers/clk/renesas/ |
D | rzg2l-cpg.h | 128 #define DEF_BASE(_name, _id, _type, _parent...) \ argument 130 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument 134 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument 136 #define DEF_DIV(_name, _id, _parent, _conf, _dtable) \ argument 140 #define DEF_DIV_RO(_name, _id, _parent, _conf, _dtable) \ argument 158 #define DEF_PLL5_FOUTPOSTDIV(_name, _id, _parent) \ argument 164 #define DEF_DSI_DIV(_name, _id, _parent, _flag) \ argument 186 #define DEF_MOD_BASE(_name, _id, _parent, _off, _bit, _is_coupled) \ argument 196 #define DEF_MOD(_name, _id, _parent, _off, _bit) \ argument 199 #define DEF_COUPLED(_name, _id, _parent, _off, _bit) \ argument
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D | renesas-cpg-mssr.h | 46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument 51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument 53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument 55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument 75 #define DEF_MOD(_name, _mod, _parent...) \ argument 83 #define DEF_MOD_STB(_name, _mod, _parent...) \ argument
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D | rcar-gen4-cpg.h | 36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument 39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument 47 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ argument 50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument
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