Searched refs:xtensa_get_sr (Results 1 – 7 of 7) sorted by relevance
8 #define xip_irqpending() (xtensa_get_sr(interrupt) & xtensa_get_sr(intenable))9 #define xip_currtime() (xtensa_get_sr(ccount))10 #define xip_elapsed_since(x) ((xtensa_get_sr(ccount) - (x)) / 1000) /* should work up to 1GHz */
40 return xtensa_get_sr(ccount); in get_ccount()50 return xtensa_get_sr(SREG_CCOMPARE + LINUX_TIMER); in get_linux_timer()
238 #define xtensa_get_sr(sr) \ macro
292 xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE)); in setup_arch()293 if (xtensa_get_sr(SREG_EPC) != XCHAL_HW_CONFIGID0 || in setup_arch()294 xtensa_get_sr(SREG_EXCSAVE) != XCHAL_HW_CONFIGID1) in setup_arch()584 xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE), in c_show()
240 unsigned intread = xtensa_get_sr(interrupt); in check_valid_nmi()241 unsigned intenable = xtensa_get_sr(intenable); in check_valid_nmi()292 unsigned intread = xtensa_get_sr(interrupt); in do_interrupt()293 unsigned intenable = xtensa_get_sr(intenable); in do_interrupt()
154 ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE); in set_ibreak_regs()218 ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE); in arch_uninstall_hw_breakpoint()
47 *cpenable = xtensa_get_sr(cpenable); in enable_cp()
