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Searched refs:xin_id (Results 1 – 25 of 25) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_vbif.c56 u32 xin_id, u32 value) in dpu_hw_set_mem_type() argument
67 if (!vbif || xin_id >= MAX_XIN_COUNT || xin_id >= 16) in dpu_hw_set_mem_type()
72 if (xin_id >= 8) { in dpu_hw_set_mem_type()
73 xin_id -= 8; in dpu_hw_set_mem_type()
78 bit_off = (xin_id & 0x7) * 4; in dpu_hw_set_mem_type()
86 u32 xin_id, bool rd, u32 limit) in dpu_hw_set_limit_conf() argument
98 reg_off += (xin_id / 4) * 4; in dpu_hw_set_limit_conf()
99 bit_off = (xin_id % 4) * 8; in dpu_hw_set_limit_conf()
107 u32 xin_id, bool rd) in dpu_hw_get_limit_conf() argument
120 reg_off += (xin_id / 4) * 4; in dpu_hw_get_limit_conf()
[all …]
Ddpu_hw_vbif.h27 u32 xin_id, bool rd, u32 limit);
37 u32 xin_id, bool rd);
46 u32 xin_id, bool enable);
55 u32 xin_id);
65 u32 xin_id, u32 level, u32 remap_level);
74 u32 xin_id, u32 value);
93 void (*set_write_gather_en)(struct dpu_hw_vbif *vbif, u32 xin_id);
Ddpu_vbif.c40 static int _dpu_vbif_wait_for_xin_halt(struct dpu_hw_vbif *vbif, u32 xin_id) in _dpu_vbif_wait_for_xin_halt() argument
53 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
57 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
66 dpu_vbif_name(vbif->idx), xin_id); in _dpu_vbif_wait_for_xin_halt()
70 dpu_vbif_name(vbif->idx), xin_id); in _dpu_vbif_wait_for_xin_halt()
111 dpu_vbif_name(vbif->idx), params->xin_id, in _dpu_vbif_apply_dynamic_ot_limit()
150 params->xin_id, params->rd); in _dpu_vbif_get_ot_limit()
157 dpu_vbif_name(vbif->idx), params->xin_id, ot_lim); in _dpu_vbif_get_ot_limit()
193 vbif->ops.set_write_gather_en(vbif, params->xin_id); in dpu_vbif_set_ot_limit()
200 trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim, in dpu_vbif_set_ot_limit()
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Ddpu_vbif.h11 u32 xin_id; member
23 u32 xin_id; member
39 u32 xin_id; member
Ddpu_trace.h75 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx),
76 TP_ARGS(pnum, xin_id, rd_lim, vbif_idx),
79 __field(u32, xin_id)
85 __entry->xin_id = xin_id;
90 __entry->pnum, __entry->xin_id, __entry->rd_lim,
824 TP_PROTO(enum dpu_vbif index, u32 xin_id),
825 TP_ARGS(index, xin_id),
828 __field( u32, xin_id )
832 __entry->xin_id = xin_id;
834 TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id)
Ddpu_encoder_phys_wb.c48 ot_params.xin_id = hw_wb->caps->xin_id; in dpu_encoder_phys_wb_set_ot_limit()
85 qos_params.xin_id = hw_wb->caps->xin_id; in dpu_encoder_phys_wb_set_qos_remap()
93 qos_params.xin_id, qos_params.is_rt); in dpu_encoder_phys_wb_set_qos_remap()
Ddpu_hw_catalog.h513 u32 xin_id; member
628 u32 xin_id; member
Ddpu_plane.c353 ot_params.xin_id = pipe->sspp->cap->xin_id; in _dpu_plane_set_ot_limit()
381 qos_params.xin_id = pipe->sspp->cap->xin_id; in _dpu_plane_set_qos_remap()
388 qos_params.xin_id, qos_params.is_rt, in _dpu_plane_set_qos_remap()
Ddpu_hw_sspp.c664 (u32 *) &cfg->xin_id); in _dpu_hw_sspp_init_debugfs()
/Linux-v6.6/drivers/gpu/drm/msm/disp/dpu1/catalog/
Ddpu_3_0_msm8998.h74 .xin_id = 0,
82 .xin_id = 4,
90 .xin_id = 8,
98 .xin_id = 12,
106 .xin_id = 1,
114 .xin_id = 5,
122 .xin_id = 9,
130 .xin_id = 13,
Ddpu_4_0_sdm845.h72 .xin_id = 0,
80 .xin_id = 4,
88 .xin_id = 8,
96 .xin_id = 12,
104 .xin_id = 1,
112 .xin_id = 5,
120 .xin_id = 9,
128 .xin_id = 13,
Ddpu_9_0_sm8550.h82 .xin_id = 0,
90 .xin_id = 4,
98 .xin_id = 8,
106 .xin_id = 12,
114 .xin_id = 1,
122 .xin_id = 5,
130 .xin_id = 9,
138 .xin_id = 13,
146 .xin_id = 14,
154 .xin_id = 15,
Ddpu_6_0_sm8250.h80 .xin_id = 0,
88 .xin_id = 4,
96 .xin_id = 8,
104 .xin_id = 12,
112 .xin_id = 1,
120 .xin_id = 5,
128 .xin_id = 9,
136 .xin_id = 13,
351 .xin_id = 6,
Ddpu_5_0_sm8150.h81 .xin_id = 0,
89 .xin_id = 4,
97 .xin_id = 8,
105 .xin_id = 12,
113 .xin_id = 1,
121 .xin_id = 5,
129 .xin_id = 9,
137 .xin_id = 13,
Ddpu_8_1_sm8450.h80 .xin_id = 0,
88 .xin_id = 4,
96 .xin_id = 8,
104 .xin_id = 12,
112 .xin_id = 1,
120 .xin_id = 5,
128 .xin_id = 9,
136 .xin_id = 13,
Ddpu_7_0_sm8350.h79 .xin_id = 0,
87 .xin_id = 4,
95 .xin_id = 8,
103 .xin_id = 12,
111 .xin_id = 1,
119 .xin_id = 5,
127 .xin_id = 9,
135 .xin_id = 13,
Ddpu_6_2_sc7180.h57 .xin_id = 0,
65 .xin_id = 1,
73 .xin_id = 5,
81 .xin_id = 9,
167 .xin_id = 6,
Ddpu_5_1_sc8180x.h80 .xin_id = 0,
88 .xin_id = 4,
96 .xin_id = 8,
104 .xin_id = 12,
112 .xin_id = 1,
120 .xin_id = 5,
128 .xin_id = 9,
136 .xin_id = 13,
Ddpu_7_2_sc7280.h62 .xin_id = 0,
70 .xin_id = 1,
78 .xin_id = 5,
86 .xin_id = 9,
180 .xin_id = 6,
Ddpu_8_0_sc8280xp.h80 .xin_id = 0,
88 .xin_id = 4,
96 .xin_id = 8,
104 .xin_id = 12,
112 .xin_id = 1,
120 .xin_id = 5,
128 .xin_id = 9,
136 .xin_id = 13,
Ddpu_6_4_sm6350.h64 .xin_id = 0,
72 .xin_id = 1,
80 .xin_id = 5,
88 .xin_id = 9,
Ddpu_5_4_sm6125.h73 .xin_id = 0,
81 .xin_id = 1,
89 .xin_id = 5,
Ddpu_6_5_qcm2290.h43 .xin_id = 0,
51 .xin_id = 1,
Ddpu_6_3_sm6115.h44 .xin_id = 0,
52 .xin_id = 1,
Ddpu_6_9_sm6375.h45 .xin_id = 0,
53 .xin_id = 1,