| /Linux-v6.6/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_kernel_queue.h | 71 uint64_t wptr_gpu_addr; member
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| D | kfd_kernel_queue.c | 122 kq->wptr_gpu_addr = kq->wptr_mem->gpu_addr; in kq_initialize()
137 prop.write_ptr = (uint32_t *) kq->wptr_gpu_addr; in kq_initialize()
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| /Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_mes.h | 175 uint64_t wptr_gpu_addr; member
185 uint64_t wptr_gpu_addr; member
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| D | amdgpu_mes.c | 550 mqd_prop.wptr_gpu_addr = p->wptr_gpu_addr; in amdgpu_mes_queue_init_mqd()
640 queue_input.wptr_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
660 queue->wptr_gpu_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
903 props->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_mes_ring_to_queue_props()
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| D | amdgpu_ring.c | 290 ring->wptr_gpu_addr = in amdgpu_ring_init()
647 prop->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
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| D | sdma_v4_0.c | 1049 u64 wptr_gpu_addr; in sdma_v4_0_gfx_resume() local
1095 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_gfx_resume()
1097 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1099 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1134 u64 wptr_gpu_addr; in sdma_v4_0_page_resume() local
1181 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_page_resume()
1183 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
1185 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
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| D | sdma_v4_4_2.c | 625 u64 wptr_gpu_addr; in sdma_v4_4_2_gfx_resume() local
673 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_gfx_resume()
675 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume()
677 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume()
713 u64 wptr_gpu_addr; in sdma_v4_4_2_page_resume() local
762 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_page_resume()
764 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume()
766 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume()
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| D | sdma_v3_0.c | 643 u64 wptr_gpu_addr; in sdma_v3_0_gfx_resume() local
706 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v3_0_gfx_resume()
709 lower_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
711 upper_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
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| D | sdma_v5_2.c | 492 u64 wptr_gpu_addr; in sdma_v5_2_gfx_resume() local
519 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_2_gfx_resume()
521 lower_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume()
523 upper_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume()
788 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
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| D | sdma_v6_0.c | 475 u64 wptr_gpu_addr; in sdma_v6_0_gfx_resume() local
503 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v6_0_gfx_resume()
505 lower_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume()
507 upper_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume()
832 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
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| D | sdma_v5_0.c | 689 u64 wptr_gpu_addr; in sdma_v5_0_gfx_resume() local
716 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_0_gfx_resume()
718 lower_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume()
720 upper_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume()
952 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
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| D | gfx_v11_0.c | 148 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx11_kiq_map_queues()
3235 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() local
3265 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3267 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3269 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3302 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3304 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3306 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3638 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
3815 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
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| D | amdgpu_ring.h | 272 u64 wptr_gpu_addr; member
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| D | gfx_v10_0.c | 3513 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx10_kiq_map_queues()
6092 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() local
6125 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6127 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6129 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6162 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6164 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6166 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6402 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6591 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
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| D | gfx_v8_0.c | 4242 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() local
4272 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume()
4273 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4274 WREG32(mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4354 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v8_0_kiq_kcq_enable()
4484 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
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| D | gfx_v9_0.c | 790 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v9_0_kiq_map_queues()
3090 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() local
3118 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume()
3119 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3120 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3335 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
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| D | mes_v10_1.c | 683 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v10_1_mqd_init()
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| D | amdgpu.h | 742 uint64_t wptr_gpu_addr; member
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| D | mes_v11_0.c | 763 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
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| D | gfx_v7_0.c | 2913 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
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