Searched refs:ucRefClkSource (Results 1 – 5 of 5) sorted by relevance
| /Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | atombios_encoders.c | 937 args.v3.acConfig.ucRefClkSource = 2; /* external src */ in amdgpu_atombios_encoder_setup_dig_transmitter()
939 args.v3.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
997 args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_EXTCLK; in amdgpu_atombios_encoder_setup_dig_transmitter()
999 args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_DCPLL; in amdgpu_atombios_encoder_setup_dig_transmitter()
1001 args.v4.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
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| /Linux-v6.6/drivers/gpu/drm/radeon/ |
| D | atombios_encoders.c | 1209 args.v3.acConfig.ucRefClkSource = 2; /* external src */ in atombios_dig_transmitter_setup2()
1211 args.v3.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2()
1269 args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_EXTCLK; in atombios_dig_transmitter_setup2()
1271 args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_DCPLL; in atombios_dig_transmitter_setup2()
1273 args.v4.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2()
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| D | atombios.h | 1095 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2 member
1107 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
1191 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New member
1203 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
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| /Linux-v6.6/drivers/gpu/drm/amd/display/dc/bios/ |
| D | command_table.c | 675 params.acConfig.ucRefClkSource = (uint8_t)pll_id; in transmitter_control_v3()
799 params.acConfig.ucRefClkSource = (uint8_t)(ref_clk_src_id); in transmitter_control_v4()
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| /Linux-v6.6/drivers/gpu/drm/amd/include/ |
| D | atombios.h | 1301 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2 member
1313 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
1397 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New member
1409 UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
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