Searched refs:tile_rows (Results 1 – 5 of 5) sorted by relevance
404 u8 tile_rows; member1289 tile->tile_rows = ctrl_tile->tile_rows; in vdec_av1_slice_setup_tile()1298 for (i = 0; i < tile->tile_rows + 1; i++) in vdec_av1_slice_setup_tile()1397 tile_group->num_tiles = tile->tile_cols * tile->tile_rows; in vdec_av1_slice_setup_tile_group()1411 vsi->frame.uh.tile.tile_rows); in vdec_av1_slice_setup_tile_group()
578 context_update_x * tile_info->tile_rows + context_update_y; in rockchip_vpu981_av1_dec_set_tile_info()586 for (tile1 = 0; tile1 < tile_info->tile_rows; tile1++) { in rockchip_vpu981_av1_dec_set_tile_info()621 !!((tile_info->tile_cols > 1) || (tile_info->tile_rows > 1))); in rockchip_vpu981_av1_dec_set_tile_info()623 hantro_reg_write(vpu, &av1_num_tile_rows_8k, tile_info->tile_rows); in rockchip_vpu981_av1_dec_set_tile_info()627 rockchip_vpu981_av1_tile_log2(tile_info->tile_rows)) in rockchip_vpu981_av1_dec_set_tile_info()
1029 unsigned int tile_rows, tiles, pitch_tiles; in intel_compute_aligned_offset() local1041 tile_rows = *y / tile_height; in intel_compute_aligned_offset()1047 offset = (tile_rows * pitch_tiles + tiles) * tile_size; in intel_compute_aligned_offset()
3217 __u8 tile_rows; member
3662 - ``tile_rows``
