Searched refs:tile_cols (Results 1 – 4 of 4) sorted by relevance
403 u8 tile_cols; member1288 tile->tile_cols = ctrl_tile->tile_cols; in vdec_av1_slice_setup_tile()1294 for (i = 0; i < tile->tile_cols + 1; i++) in vdec_av1_slice_setup_tile()1397 tile_group->num_tiles = tile->tile_cols * tile->tile_rows; in vdec_av1_slice_setup_tile_group()1407 if (i != ctrl_tge[i].tile_row * vsi->frame.uh.tile.tile_cols + in vdec_av1_slice_setup_tile_group()1669 tile_row = tile_num / tile->tile_cols; in vdec_av1_slice_setup_tile_buffer()1670 tile_col = tile_num % tile->tile_cols; in vdec_av1_slice_setup_tile_buffer()
574 tile_info->context_update_tile_id / tile_info->tile_cols; in rockchip_vpu981_av1_dec_set_tile_info()576 tile_info->context_update_tile_id % tile_info->tile_cols; in rockchip_vpu981_av1_dec_set_tile_info()585 for (tile0 = 0; tile0 < tile_info->tile_cols; tile0++) { in rockchip_vpu981_av1_dec_set_tile_info()587 int tile_id = tile1 * tile_info->tile_cols + tile0; in rockchip_vpu981_av1_dec_set_tile_info()621 !!((tile_info->tile_cols > 1) || (tile_info->tile_rows > 1))); in rockchip_vpu981_av1_dec_set_tile_info()622 hantro_reg_write(vpu, &av1_num_tile_cols_8k, tile_info->tile_cols); in rockchip_vpu981_av1_dec_set_tile_info()626 if (rockchip_vpu981_av1_tile_log2(tile_info->tile_cols) || in rockchip_vpu981_av1_dec_set_tile_info()
3216 __u8 tile_cols; member
3659 - ``tile_cols``
