Searched refs:smnPCIE_LC_LINK_WIDTH_CNTL (Results 1 – 7 of 7) sorted by relevance
54 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro507 reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL); in nbio_v2_3_apply_lc_spc_mode_wa()530 reg_data = RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL); in nbio_v2_3_apply_l1_link_width_reconfig_wa()532 WREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL, reg_data); in nbio_v2_3_apply_l1_link_width_reconfig_wa()
72 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro2078 return (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & in smu_v11_0_get_current_pcie_link_width_level()
84 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x1a340288 macro1932 return REG_GET_FIELD(RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL), in smu_v13_0_6_get_current_pcie_link_width_level()
78 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro2026 return (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & in smu_v13_0_get_current_pcie_link_width_level()
50 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro2228 return (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & in vega12_get_current_pcie_link_width_level()
55 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro3318 return (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & in vega20_get_current_pcie_link_width_level()
57 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288 macro4631 return (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & in vega10_get_current_pcie_link_width_level()
