Searched refs:rx_intr_status (Results 1 – 2 of 2) sorted by relevance
211 struct cmd_pkt_interrupt_status rx_intr_status; /* */ in cmpk_handle_interrupt_status() local221 rx_intr_status.length = pmsg[1]; in cmpk_handle_interrupt_status()222 if (rx_intr_status.length != (sizeof(struct cmd_pkt_interrupt_status) - 2)) { in cmpk_handle_interrupt_status()230 rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4)); in cmpk_handle_interrupt_status()233 rx_intr_status.interrupt_status); in cmpk_handle_interrupt_status()235 if (rx_intr_status.interrupt_status & ISR_TX_BCN_OK) { in cmpk_handle_interrupt_status()238 } else if (rx_intr_status.interrupt_status & ISR_TX_BCN_ERR) { in cmpk_handle_interrupt_status()243 if (rx_intr_status.interrupt_status & ISR_BCN_TIMER_INTR) in cmpk_handle_interrupt_status()
347 u32 rx_intr_status, tx_intr_status = 0; in t7xx_dpmaif_hw_get_intr_cnt() local350 rx_intr_status = ioread32(hw_info->pcie_base + DPMAIF_AP_APDL_L2TISAR0); in t7xx_dpmaif_hw_get_intr_cnt()373 if (rx_intr_status) { in t7xx_dpmaif_hw_get_intr_cnt()375 rx_intr_status &= DP_DL_Q0_STATUS_MASK; in t7xx_dpmaif_hw_get_intr_cnt()380 rx_intr_status &= ~DP_DL_INT_Q0_DONE; in t7xx_dpmaif_hw_get_intr_cnt()382 rx_intr_status &= DP_DL_Q1_STATUS_MASK; in t7xx_dpmaif_hw_get_intr_cnt()384 rx_intr_status &= ~DP_DL_INT_Q1_DONE; in t7xx_dpmaif_hw_get_intr_cnt()387 if (rx_intr_status) in t7xx_dpmaif_hw_get_intr_cnt()388 t7xx_dpmaif_hw_check_rx_intr(hw_info, rx_intr_status, para, qno); in t7xx_dpmaif_hw_get_intr_cnt()
