Searched refs:rlc_hdr (Results 1 – 9 of 9) sorted by relevance
284 const struct rlc_firmware_header_v2_0 *rlc_hdr; in amdgpu_gfx_rlc_init_microcode_v2_0() local289 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in amdgpu_gfx_rlc_init_microcode_v2_0()291 adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); in amdgpu_gfx_rlc_init_microcode_v2_0()292 adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); in amdgpu_gfx_rlc_init_microcode_v2_0()294 le32_to_cpu(rlc_hdr->save_and_restore_offset); in amdgpu_gfx_rlc_init_microcode_v2_0()296 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset); in amdgpu_gfx_rlc_init_microcode_v2_0()298 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations); in amdgpu_gfx_rlc_init_microcode_v2_0()300 le32_to_cpu(rlc_hdr->reg_restore_list_size); in amdgpu_gfx_rlc_init_microcode_v2_0()302 le32_to_cpu(rlc_hdr->reg_list_format_start); in amdgpu_gfx_rlc_init_microcode_v2_0()304 le32_to_cpu(rlc_hdr->reg_list_format_separate_start); in amdgpu_gfx_rlc_init_microcode_v2_0()[all …]
138 const struct rlc_firmware_header_v1_0 *rlc_hdr = in amdgpu_ucode_print_rlc_hdr() local142 le32_to_cpu(rlc_hdr->ucode_feature_version)); in amdgpu_ucode_print_rlc_hdr()144 le32_to_cpu(rlc_hdr->save_and_restore_offset)); in amdgpu_ucode_print_rlc_hdr()146 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset)); in amdgpu_ucode_print_rlc_hdr()148 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations)); in amdgpu_ucode_print_rlc_hdr()150 le32_to_cpu(rlc_hdr->master_pkt_description_offset)); in amdgpu_ucode_print_rlc_hdr()152 const struct rlc_firmware_header_v2_0 *rlc_hdr = in amdgpu_ucode_print_rlc_hdr() local155 container_of(rlc_hdr, struct rlc_firmware_header_v2_1, v2_0); in amdgpu_ucode_print_rlc_hdr()167 le32_to_cpu(rlc_hdr->ucode_feature_version)); in amdgpu_ucode_print_rlc_hdr()168 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()[all …]
947 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v8_0_init_microcode() local1051 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v8_0_init_microcode()1052 adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1053 adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()1056 le32_to_cpu(rlc_hdr->save_and_restore_offset); in gfx_v8_0_init_microcode()1058 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset); in gfx_v8_0_init_microcode()1060 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations); in gfx_v8_0_init_microcode()1062 le32_to_cpu(rlc_hdr->reg_restore_list_size); in gfx_v8_0_init_microcode()1064 le32_to_cpu(rlc_hdr->reg_list_format_start); in gfx_v8_0_init_microcode()1066 le32_to_cpu(rlc_hdr->reg_list_format_separate_start); in gfx_v8_0_init_microcode()[all …]
492 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v11_0_init_microcode() local534 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v11_0_init_microcode()535 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v11_0_init_microcode()536 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v11_0_init_microcode()1080 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode() local1171 rlc_hdr = (const struct rlc_firmware_header_v2_0 *) in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1174 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1175 fw_size = le32_to_cpu(rlc_hdr->header.ucode_size_bytes); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1179 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()1180 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()
317 const struct rlc_firmware_header_v1_0 *rlc_hdr; in gfx_v6_0_init_microcode() local368 rlc_hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; in gfx_v6_0_init_microcode()369 adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); in gfx_v6_0_init_microcode()370 adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
369 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v9_4_3_init_rlc_microcode() local378 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v9_4_3_init_rlc_microcode()380 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v9_4_3_init_rlc_microcode()381 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v9_4_3_init_rlc_microcode()
3961 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v10_0_init_microcode() local4002 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v10_0_init_microcode()4003 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v10_0_init_microcode()4004 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v10_0_init_microcode()5346 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode() local5379 rlc_hdr = (const struct rlc_firmware_header_v2_0 *) in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()5382 le32_to_cpu(rlc_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()5383 fw_size = le32_to_cpu(rlc_hdr->header.ucode_size_bytes); in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
1287 const struct rlc_firmware_header_v2_0 *rlc_hdr; in gfx_v9_0_init_rlc_microcode() local1315 rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; in gfx_v9_0_init_rlc_microcode()1317 version_major = le16_to_cpu(rlc_hdr->header.header_version_major); in gfx_v9_0_init_rlc_microcode()1318 version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); in gfx_v9_0_init_rlc_microcode()
115 const struct rlc_firmware_header_v1_0 *rlc_hdr = in radeon_ucode_print_rlc_hdr() local119 le32_to_cpu(rlc_hdr->ucode_feature_version)); in radeon_ucode_print_rlc_hdr()121 le32_to_cpu(rlc_hdr->save_and_restore_offset)); in radeon_ucode_print_rlc_hdr()123 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset)); in radeon_ucode_print_rlc_hdr()125 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations)); in radeon_ucode_print_rlc_hdr()127 le32_to_cpu(rlc_hdr->master_pkt_description_offset)); in radeon_ucode_print_rlc_hdr()
