/Linux-v6.6/drivers/phy/qualcomm/ |
D | phy-qcom-sgmii-eth.c | 115 regmap_write(regmap, QSERDES_PCS_SW_RESET, 0x01); in qcom_dwmac_sgmii_phy_init_1g() 116 regmap_write(regmap, QSERDES_PCS_POWER_DOWN_CONTROL, 0x01); in qcom_dwmac_sgmii_phy_init_1g() 118 regmap_write(regmap, QSERDES_COM_PLL_IVCO, 0x0F); in qcom_dwmac_sgmii_phy_init_1g() 119 regmap_write(regmap, QSERDES_COM_CP_CTRL_MODE0, 0x06); in qcom_dwmac_sgmii_phy_init_1g() 120 regmap_write(regmap, QSERDES_COM_PLL_RCTRL_MODE0, 0x16); in qcom_dwmac_sgmii_phy_init_1g() 121 regmap_write(regmap, QSERDES_COM_PLL_CCTRL_MODE0, 0x36); in qcom_dwmac_sgmii_phy_init_1g() 122 regmap_write(regmap, QSERDES_COM_SYSCLK_EN_SEL, 0x1A); in qcom_dwmac_sgmii_phy_init_1g() 123 regmap_write(regmap, QSERDES_COM_LOCK_CMP1_MODE0, 0x0A); in qcom_dwmac_sgmii_phy_init_1g() 124 regmap_write(regmap, QSERDES_COM_LOCK_CMP2_MODE0, 0x1A); in qcom_dwmac_sgmii_phy_init_1g() 125 regmap_write(regmap, QSERDES_COM_DEC_START_MODE0, 0x82); in qcom_dwmac_sgmii_phy_init_1g() [all …]
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/Linux-v6.6/drivers/gpu/drm/sprd/ |
D | megacores_pll.c | 102 regmap_write(regmap, reg_addr[i], reg_val[i]); in dphy_set_pll_reg() 131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg() 132 regmap_write(regmap, 0x41, val[DATA]); in dphy_set_timing_reg() 133 regmap_write(regmap, 0x51, val[DATA]); in dphy_set_timing_reg() 134 regmap_write(regmap, 0x61, val[DATA]); in dphy_set_timing_reg() 135 regmap_write(regmap, 0x71, val[DATA]); in dphy_set_timing_reg() 137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg() 138 regmap_write(regmap, 0xa0, val[DATA]); in dphy_set_timing_reg() 139 regmap_write(regmap, 0xb0, val[DATA]); in dphy_set_timing_reg() 140 regmap_write(regmap, 0xc0, val[DATA]); in dphy_set_timing_reg() [all …]
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/Linux-v6.6/sound/soc/codecs/ |
D | es8326.c | 366 regmap_write(es8326->regmap, ES8326_CLK_DIV1, in es8326_pcm_hw_params() 368 regmap_write(es8326->regmap, ES8326_CLK_DIV2, in es8326_pcm_hw_params() 370 regmap_write(es8326->regmap, ES8326_CLK_DLL, in es8326_pcm_hw_params() 372 regmap_write(es8326->regmap, ES8326_CLK_MUX, in es8326_pcm_hw_params() 374 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, in es8326_pcm_hw_params() 376 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, in es8326_pcm_hw_params() 378 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, in es8326_pcm_hw_params() 380 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, in es8326_pcm_hw_params() 396 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); in es8326_mute() 399 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); in es8326_mute() [all …]
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D | mt6358.c | 333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable() 894 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event() 896 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event() 898 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event() 900 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event() 911 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event() 912 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event() 936 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event() 938 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event() 940 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event() [all …]
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D | rt1305.c | 393 regmap_write(regmap, RT1305_RESET, 0); in rt1305_reset() 999 regmap_write(rt1305->regmap, RT1305_ADC_SET_3, 0x0219); in rt1305_calibrate() 1000 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548); in rt1305_calibrate() 1001 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320); in rt1305_calibrate() 1002 regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x1000); in rt1305_calibrate() 1003 regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0600); in rt1305_calibrate() 1004 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xffd0); in rt1305_calibrate() 1005 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080); in rt1305_calibrate() 1006 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880); in rt1305_calibrate() 1007 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe); in rt1305_calibrate() [all …]
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D | rt700.c | 38 ret = regmap_write(regmap, addr, value); in rt700_index_write() 280 regmap_write(rt700->regmap, in rt700_jack_init() 285 regmap_write(rt700->regmap, in rt700_jack_init() 287 regmap_write(rt700->regmap, in rt700_jack_init() 289 regmap_write(rt700->regmap, in rt700_jack_init() 299 regmap_write(rt700->regmap, in rt700_jack_init() 301 regmap_write(rt700->regmap, in rt700_jack_init() 303 regmap_write(rt700->regmap, in rt700_jack_init() 311 regmap_write(rt700->regmap, in rt700_jack_init() 403 regmap_write(rt700->regmap, in rt700_set_amp_gain_put() [all …]
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D | rt715.c | 43 ret = regmap_write(regmap, addr, value); in rt715_index_write() 58 ret = regmap_write(regmap, addr, value); in rt715_index_write_nid() 99 regmap_write(regmap, RT715_FUNC_RESET, 0); in rt715_reset() 158 regmap_write(rt715->regmap, in rt715_set_amp_gain_put() 184 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put() 186 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put() 191 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put() 195 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put() 212 regmap_write(rt715->regmap, in rt715_set_amp_gain_put() 280 regmap_write(rt715->regmap, in rt715_set_main_switch_put() [all …]
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D | rt711.c | 38 ret = regmap_write(regmap, addr, value); in rt711_index_write() 79 regmap_write(regmap, RT711_FUNC_RESET, 0); in rt711_reset() 93 regmap_write(rt711->regmap, in rt711_calibration() 129 regmap_write(rt711->regmap, in rt711_calibration() 369 regmap_write(rt711->regmap, in rt711_jack_init() 374 regmap_write(rt711->regmap, in rt711_jack_init() 376 regmap_write(rt711->regmap, in rt711_jack_init() 378 regmap_write(rt711->regmap, in rt711_jack_init() 440 regmap_write(rt711->regmap, in rt711_jack_init() 442 regmap_write(rt711->regmap, in rt711_jack_init() [all …]
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D | rt1308-sdw.c | 115 regmap_write(rt1308->regmap, 0xe0, value); in rt1308_clock_config() 116 regmap_write(rt1308->regmap, 0xf0, value); in rt1308_clock_config() 173 regmap_write(rt1308->regmap, 0xc7f0, 0x04); in rt1308_apply_calib_params() 174 regmap_write(rt1308->regmap, 0xc7f1, 0xfe); in rt1308_apply_calib_params() 176 regmap_write(rt1308->regmap, 0xc7f0, 0x44); in rt1308_apply_calib_params() 178 regmap_write(rt1308->regmap, 0xc240, 0x10); in rt1308_apply_calib_params() 209 regmap_write(rt1308->regmap, reg, data); in rt1308_apply_bq_params() 240 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); in rt1308_io_init() 247 regmap_write(rt1308->regmap, 0xc103, 0xc0); in rt1308_io_init() 248 regmap_write(rt1308->regmap, 0xc030, 0x17); in rt1308_io_init() [all …]
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/Linux-v6.6/drivers/gpu/drm/bridge/adv7511/ |
D | adv7533.c | 42 regmap_write(adv->regmap_cec, 0x16, in adv7511_dsi_config_timing_gen() 46 regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4); in adv7511_dsi_config_timing_gen() 47 regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff); in adv7511_dsi_config_timing_gen() 48 regmap_write(adv->regmap_cec, 0x2a, hsw >> 4); in adv7511_dsi_config_timing_gen() 49 regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff); in adv7511_dsi_config_timing_gen() 50 regmap_write(adv->regmap_cec, 0x2c, hfp >> 4); in adv7511_dsi_config_timing_gen() 51 regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff); in adv7511_dsi_config_timing_gen() 52 regmap_write(adv->regmap_cec, 0x2e, hbp >> 4); in adv7511_dsi_config_timing_gen() 53 regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff); in adv7511_dsi_config_timing_gen() 56 regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4); in adv7511_dsi_config_timing_gen() [all …]
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/Linux-v6.6/drivers/gpu/drm/bridge/ |
D | lontium-lt9611.c | 146 regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256)); in lt9611_mipi_video_setup() 147 regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256)); in lt9611_mipi_video_setup() 149 regmap_write(lt9611->regmap, 0x830f, (u8)(vactive / 256)); in lt9611_mipi_video_setup() 150 regmap_write(lt9611->regmap, 0x8310, (u8)(vactive % 256)); in lt9611_mipi_video_setup() 152 regmap_write(lt9611->regmap, 0x8311, (u8)(h_total / 256)); in lt9611_mipi_video_setup() 153 regmap_write(lt9611->regmap, 0x8312, (u8)(h_total % 256)); in lt9611_mipi_video_setup() 155 regmap_write(lt9611->regmap, 0x8313, (u8)(hactive / 256)); in lt9611_mipi_video_setup() 156 regmap_write(lt9611->regmap, 0x8314, (u8)(hactive % 256)); in lt9611_mipi_video_setup() 158 regmap_write(lt9611->regmap, 0x8315, (u8)(vsync_len % 256)); in lt9611_mipi_video_setup() 159 regmap_write(lt9611->regmap, 0x8316, (u8)(hsync_len % 256)); in lt9611_mipi_video_setup() [all …]
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D | chrontel-ch7033.c | 337 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_disable() 345 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_enable() 362 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_mode_set() 365 regmap_write(priv->regmap, 0x52, 0x00); in ch7033_bridge_mode_set() 367 regmap_write(priv->regmap, 0x52, RESETIB); in ch7033_bridge_mode_set() 372 regmap_write(priv->regmap, 0x03, 0x00); in ch7033_bridge_mode_set() 382 regmap_write(priv->regmap, 0x0b, (mode->htotal >> 8) << 3 | in ch7033_bridge_mode_set() 384 regmap_write(priv->regmap, 0x0c, mode->hdisplay); in ch7033_bridge_mode_set() 385 regmap_write(priv->regmap, 0x0d, mode->htotal); in ch7033_bridge_mode_set() 386 regmap_write(priv->regmap, 0x0e, (hsynclen >> 8) << 3 | in ch7033_bridge_mode_set() [all …]
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/Linux-v6.6/drivers/media/tuners/ |
D | m88rs6000t.c | 108 ret = regmap_write(dev->regmap, 0x05, 0x40); in m88rs6000t_set_demod_mclk() 111 ret = regmap_write(dev->regmap, 0x11, 0x08); in m88rs6000t_set_demod_mclk() 114 ret = regmap_write(dev->regmap, 0x15, reg15); in m88rs6000t_set_demod_mclk() 117 ret = regmap_write(dev->regmap, 0x16, reg16); in m88rs6000t_set_demod_mclk() 120 ret = regmap_write(dev->regmap, 0x1D, reg1D); in m88rs6000t_set_demod_mclk() 123 ret = regmap_write(dev->regmap, 0x1E, reg1E); in m88rs6000t_set_demod_mclk() 126 ret = regmap_write(dev->regmap, 0x1F, reg1F); in m88rs6000t_set_demod_mclk() 129 ret = regmap_write(dev->regmap, 0x17, 0xc1); in m88rs6000t_set_demod_mclk() 132 ret = regmap_write(dev->regmap, 0x17, 0x81); in m88rs6000t_set_demod_mclk() 136 ret = regmap_write(dev->regmap, 0x05, 0x00); in m88rs6000t_set_demod_mclk() [all …]
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/Linux-v6.6/drivers/iio/imu/inv_mpu6050/ |
D | inv_mpu_aux.c | 29 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer() 35 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer() 44 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer() 50 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer() 57 regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl); in inv_mpu_i2c_master_xfer() 59 regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider); in inv_mpu_i2c_master_xfer() 77 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val); in inv_mpu_aux_init() 82 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0); in inv_mpu_aux_init() 91 return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val); in inv_mpu_aux_init() 114 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), in inv_mpu_aux_read() [all …]
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/Linux-v6.6/drivers/media/dvb-frontends/ |
D | rtl2832_sdr.c | 549 ret = regmap_write(dev->regmap, 0x1b1, u8tmp1); in rtl2832_sdr_set_adc() 553 ret = regmap_write(dev->regmap, 0x008, u8tmp2); in rtl2832_sdr_set_adc() 557 ret = regmap_write(dev->regmap, 0x006, 0x80); in rtl2832_sdr_set_adc() 584 ret = regmap_write(dev->regmap, 0x019, 0x05); in rtl2832_sdr_set_adc() 599 ret = regmap_write(dev->regmap, 0x061, 0x60); in rtl2832_sdr_set_adc() 606 ret = regmap_write(dev->regmap, 0x112, 0x5a); in rtl2832_sdr_set_adc() 607 ret = regmap_write(dev->regmap, 0x102, 0x40); in rtl2832_sdr_set_adc() 608 ret = regmap_write(dev->regmap, 0x103, 0x5a); in rtl2832_sdr_set_adc() 609 ret = regmap_write(dev->regmap, 0x1c7, 0x30); in rtl2832_sdr_set_adc() 610 ret = regmap_write(dev->regmap, 0x104, 0xd0); in rtl2832_sdr_set_adc() [all …]
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D | ts2020.c | 68 ret = regmap_write(priv->regmap, u8tmp, 0x00); in ts2020_sleep() 86 regmap_write(priv->regmap, 0x42, 0x73); in ts2020_init() 87 regmap_write(priv->regmap, 0x05, priv->clk_out_div); in ts2020_init() 88 regmap_write(priv->regmap, 0x20, 0x27); in ts2020_init() 89 regmap_write(priv->regmap, 0x07, 0x02); in ts2020_init() 90 regmap_write(priv->regmap, 0x11, 0xff); in ts2020_init() 91 regmap_write(priv->regmap, 0x60, 0xf9); in ts2020_init() 92 regmap_write(priv->regmap, 0x08, 0x01); in ts2020_init() 93 regmap_write(priv->regmap, 0x00, 0x41); in ts2020_init() 109 regmap_write(priv->regmap, 0x00, 0x01); in ts2020_init() [all …]
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/Linux-v6.6/drivers/gpu/drm/sun4i/ |
D | sun8i_vi_scaler.c | 890 regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, i), in sun8i_vi_scaler_set_coeff() 892 regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, i), in sun8i_vi_scaler_set_coeff() 894 regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, i), in sun8i_vi_scaler_set_coeff() 896 regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, i), in sun8i_vi_scaler_set_coeff() 903 regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, i), in sun8i_vi_scaler_set_coeff() 905 regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, i), in sun8i_vi_scaler_set_coeff() 922 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_enable() 967 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup() 971 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup() 973 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup() [all …]
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D | sun4i_frontend.c | 89 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), in sun4i_frontend_scaler_init() 91 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i), in sun4i_frontend_scaler_init() 93 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i), in sun4i_frontend_scaler_init() 95 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i), in sun4i_frontend_scaler_init() 97 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i), in sun4i_frontend_scaler_init() 99 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i), in sun4i_frontend_scaler_init() 179 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG, in sun4i_frontend_update_buffer() 186 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG, in sun4i_frontend_update_buffer() 194 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG, in sun4i_frontend_update_buffer() 209 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, in sun4i_frontend_update_buffer() [all …]
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/Linux-v6.6/drivers/power/reset/ |
D | arm-versatile-reboot.c | 79 regmap_write(syscon_regmap, INTEGRATOR_HDR_LOCK_OFFSET, in versatile_reboot() 87 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot() 93 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot() 97 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot() 99 regmap_write(syscon_regmap, in versatile_reboot() 103 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot() 105 regmap_write(syscon_regmap, in versatile_reboot() 110 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot() 112 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot() 114 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot() [all …]
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/Linux-v6.6/drivers/phy/allwinner/ |
D | phy-sun6i-mipi-dphy.c | 229 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG, in sun6i_a31_mipi_dphy_tx_power_on() 236 regmap_write(dphy->regs, SUN6I_DPHY_ANA1_REG, in sun6i_a31_mipi_dphy_tx_power_on() 240 regmap_write(dphy->regs, SUN6I_DPHY_ANA4_REG, in sun6i_a31_mipi_dphy_tx_power_on() 251 regmap_write(dphy->regs, SUN6I_DPHY_ANA2_REG, in sun6i_a31_mipi_dphy_tx_power_on() 255 regmap_write(dphy->regs, SUN6I_DPHY_ANA3_REG, in sun6i_a31_mipi_dphy_tx_power_on() 267 regmap_write(dphy->regs, SUN6I_DPHY_ANA4_REG, in sun50i_a100_mipi_dphy_tx_power_on() 287 regmap_write(dphy->regs, SUN6I_DPHY_ANA3_REG, in sun50i_a100_mipi_dphy_tx_power_on() 292 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG, in sun50i_a100_mipi_dphy_tx_power_on() 296 regmap_write(dphy->regs, SUN50I_COMBO_PHY_REG0, in sun50i_a100_mipi_dphy_tx_power_on() 303 regmap_write(dphy->regs, SUN50I_DPHY_PLL_REG0, in sun50i_a100_mipi_dphy_tx_power_on() [all …]
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/Linux-v6.6/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-rk.c | 113 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_to_rmii() 129 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed() 137 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed() 193 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rgmii() 196 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON0, in rk3128_set_to_rgmii() 211 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rmii() 225 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed() 228 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed() 231 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed() 247 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rmii_speed() [all …]
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/Linux-v6.6/drivers/gpu/drm/meson/ |
D | meson_vclk.c | 246 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800023d); in meson_venci_cvbs_clock_config() 247 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00); in meson_venci_cvbs_clock_config() 248 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_venci_cvbs_clock_config() 249 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); in meson_venci_cvbs_clock_config() 250 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config() 251 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_venci_cvbs_clock_config() 252 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4800023d); in meson_venci_cvbs_clock_config() 259 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4000027b); in meson_venci_cvbs_clock_config() 260 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300); in meson_venci_cvbs_clock_config() 261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844); in meson_venci_cvbs_clock_config() [all …]
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/Linux-v6.6/drivers/phy/lantiq/ |
D | phy-lantiq-vrx200-pcie.c | 103 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL1, 0x120e); in ltq_vrx200_pcie_phy_common_setup() 106 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, 0x39d7); in ltq_vrx200_pcie_phy_common_setup() 107 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, 0x0900); in ltq_vrx200_pcie_phy_common_setup() 110 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_EI, 0x0004); in ltq_vrx200_pcie_phy_common_setup() 111 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_A_CTRL, 0x6803); in ltq_vrx200_pcie_phy_common_setup() 118 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL2, 0x0706); in ltq_vrx200_pcie_phy_common_setup() 121 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL3, 0x1fff); in ltq_vrx200_pcie_phy_common_setup() 124 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL1, 0x0810); in ltq_vrx200_pcie_phy_common_setup() 131 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL2, 0x2e00); in ltq_vrx200_pcie_phy_common_setup() 134 regmap_write(priv->phy_regmap, PCIE_PHY_TX2_CTRL2, 0x3096); in ltq_vrx200_pcie_phy_common_setup() [all …]
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/Linux-v6.6/sound/soc/uniphier/ |
D | aio-core.c | 91 regmap_write(r, SG_AOUTEN, (enable) ? ~0 : 0); in aio_iecout_set_enable() 205 regmap_write(r, A2RBNMAPCTR0(sub->swm->rb.hw), in aio_init() 207 regmap_write(r, A2CHNMAPCTR0(sub->swm->ch.hw), in aio_init() 215 regmap_write(r, A2IIFNMAPCTR0(sub->swm->iif.hw), in aio_init() 217 regmap_write(r, A2IPORTNMAPCTR0(sub->swm->iport.hw), in aio_init() 220 regmap_write(r, A2OIFNMAPCTR0(sub->swm->oif.hw), in aio_init() 222 regmap_write(r, A2OPORTNMAPCTR0(sub->swm->oport.hw), in aio_init() 227 regmap_write(r, A2OIFNMAPCTR0(sub->swm->oif.hw), in aio_init() 229 regmap_write(r, A2OPORTNMAPCTR0(sub->swm->oport.hw), in aio_init() 231 regmap_write(r, A2CHNMAPCTR0(sub->swm->och.hw), in aio_init() [all …]
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/Linux-v6.6/drivers/phy/amlogic/ |
D | phy-meson-axg-mipi-dphy.c | 229 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, 0x1); in phy_meson_axg_mipi_dphy_power_on() 230 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, in phy_meson_axg_mipi_dphy_power_on() 247 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM, in phy_meson_axg_mipi_dphy_power_on() 253 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1, in phy_meson_axg_mipi_dphy_power_on() 256 regmap_write(priv->regmap, MIPI_DSI_HS_TIM, in phy_meson_axg_mipi_dphy_power_on() 262 regmap_write(priv->regmap, MIPI_DSI_LP_TIM, in phy_meson_axg_mipi_dphy_power_on() 268 regmap_write(priv->regmap, MIPI_DSI_ANA_UP_TIM, 0x0100); in phy_meson_axg_mipi_dphy_power_on() 269 regmap_write(priv->regmap, MIPI_DSI_INIT_TIM, in phy_meson_axg_mipi_dphy_power_on() 271 regmap_write(priv->regmap, MIPI_DSI_WAKEUP_TIM, in phy_meson_axg_mipi_dphy_power_on() 273 regmap_write(priv->regmap, MIPI_DSI_LPOK_TIM, 0x7C); in phy_meson_axg_mipi_dphy_power_on() [all …]
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