Home
last modified time | relevance | path

Searched refs:regVPG0_VPG_MEM_PWR (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h9122 #define regVPG0_VPG_MEM_PWR … macro
Ddcn_3_1_5_offset.h11032 #define regVPG0_VPG_MEM_PWR … macro
Ddcn_3_1_2_offset.h11287 #define regVPG0_VPG_MEM_PWR … macro
Ddcn_3_2_1_offset.h10448 #define regVPG0_VPG_MEM_PWR … macro
Ddcn_3_2_0_offset.h10449 #define regVPG0_VPG_MEM_PWR … macro
Ddcn_3_1_6_offset.h11511 #define regVPG0_VPG_MEM_PWR … macro