Searched refs:regUVD_VCPU_CNTL (Results 1 – 5 of 5) sorted by relevance
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
D | vcn_v4_0_3.c | 751 VCN, 0, regUVD_VCPU_CNTL), tmp, 0, indirect); in vcn_v4_0_3_start_dpg_mode() 798 VCN, 0, regUVD_VCPU_CNTL), tmp, 0, indirect); in vcn_v4_0_3_start_dpg_mode() 1068 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_VCPU_CNTL), in vcn_v4_0_3_start() 1132 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_VCPU_CNTL), 0, in vcn_v4_0_3_start() 1152 regUVD_VCPU_CNTL), in vcn_v4_0_3_start() 1157 regUVD_VCPU_CNTL), in vcn_v4_0_3_start() 1299 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_VCPU_CNTL), in vcn_v4_0_3_stop() 1304 WREG32_P(SOC15_REG_OFFSET(VCN, vcn_inst, regUVD_VCPU_CNTL), 0, in vcn_v4_0_3_stop()
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D | vcn_v4_0.c | 939 VCN, inst_idx, regUVD_VCPU_CNTL), tmp, 0, indirect); in vcn_v4_0_start_dpg_mode() 986 VCN, inst_idx, regUVD_VCPU_CNTL), tmp, 0, indirect); in vcn_v4_0_start_dpg_mode() 1070 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), in vcn_v4_0_start() 1131 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), 0, in vcn_v4_0_start() 1158 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), in vcn_v4_0_start() 1162 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), 0, in vcn_v4_0_start() 1502 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), in vcn_v4_0_stop() 1507 WREG32_P(SOC15_REG_OFFSET(VCN, i, regUVD_VCPU_CNTL), 0, in vcn_v4_0_stop()
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_2_6_0_offset.h | 74 #define regUVD_VCPU_CNTL … macro
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D | vcn_4_0_0_offset.h | 422 #define regUVD_VCPU_CNTL … macro
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D | vcn_4_0_3_offset.h | 424 #define regUVD_VCPU_CNTL … macro
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