Searched refs:regUVD_VCPU_CACHE_SIZE1 (Results 1 – 5 of 5) sorted by relevance
| /Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | vcn_v4_0_3.c | 369 WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE1, in vcn_v4_0_3_mc_resume()
474 VCN, 0, regUVD_VCPU_CACHE_SIZE1), AMDGPU_VCN_STACK_SIZE, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
936 regUVD_VCPU_CACHE_SIZE1), AMDGPU_VCN_STACK_SIZE); in vcn_v4_0_3_start_sriov()
|
| D | vcn_v4_0.c | 407 WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE); in vcn_v4_0_mc_resume()
502 VCN, inst_idx, regUVD_VCPU_CACHE_SIZE1), AMDGPU_VCN_STACK_SIZE, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
1309 regUVD_VCPU_CACHE_SIZE1), in vcn_v4_0_start_sriov()
|
| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_2_6_0_offset.h | 36 #define regUVD_VCPU_CACHE_SIZE1 … macro
|
| D | vcn_4_0_0_offset.h | 384 #define regUVD_VCPU_CACHE_SIZE1 … macro
|
| D | vcn_4_0_3_offset.h | 386 #define regUVD_VCPU_CACHE_SIZE1 … macro
|
