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Searched refs:regUVD_RB_RPTR (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c1014 WREG32_SOC15(VCN, inst_idx, regUVD_RB_RPTR, 0); in vcn_v4_0_start_dpg_mode()
1017 tmp = RREG32_SOC15(VCN, inst_idx, regUVD_RB_RPTR); in vcn_v4_0_start_dpg_mode()
1197 WREG32_SOC15(VCN, i, regUVD_RB_RPTR, 0); in vcn_v4_0_start()
1200 tmp = RREG32_SOC15(VCN, i, regUVD_RB_RPTR); in vcn_v4_0_start()
1441 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v4_0_stop_dpg_mode()
1598 return RREG32_SOC15(VCN, ring->me, regUVD_RB_RPTR); in vcn_v4_0_unified_ring_get_rptr()
Dvcn_v4_0_3.c833 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0); in vcn_v4_0_3_start_dpg_mode()
1196 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0); in vcn_v4_0_3_start()
1232 SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v4_0_3_stop_dpg_mode()
1359 return RREG32_SOC15(VCN, GET_INST(VCN, ring->me), regUVD_RB_RPTR); in vcn_v4_0_3_unified_ring_get_rptr()
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h1318 #define regUVD_RB_RPTR … macro
Dvcn_4_0_0_offset.h1312 #define regUVD_RB_RPTR … macro
Dvcn_4_0_3_offset.h1240 #define regUVD_RB_RPTR … macro