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Searched refs:regUVD_RB_BASE_HI (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h1314 #define regUVD_RB_BASE_HI … macro
Dvcn_4_0_0_offset.h208 #define regUVD_RB_BASE_HI … macro
Dvcn_4_0_3_offset.h208 #define regUVD_RB_BASE_HI … macro
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0_3.c820 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI, in vcn_v4_0_3_start_dpg_mode()
1184 WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI, in vcn_v4_0_3_start()
Dvcn_v4_0.c1007 WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); in vcn_v4_0_start_dpg_mode()
1190 WREG32_SOC15(VCN, i, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); in vcn_v4_0_start()