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Searched refs:regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h8211 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_1_5_offset.h8915 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_1_2_offset.h9156 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_2_1_offset.h8285 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_2_0_offset.h8286 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro
Ddcn_3_1_6_offset.h9380 #define regOTG1_OTG_DRR_TIMING_INT_STATUS_BASE_IDX … macro