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Searched refs:regDSCL0_DSCL_MEM_PWR_CTRL (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h4736 #define regDSCL0_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_5_offset.h3582 #define regDSCL0_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_2_offset.h3823 #define regDSCL0_DSCL_MEM_PWR_CTRL macro
Ddcn_3_2_1_offset.h3348 #define regDSCL0_DSCL_MEM_PWR_CTRL macro
Ddcn_3_2_0_offset.h3349 #define regDSCL0_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_6_offset.h4043 #define regDSCL0_DSCL_MEM_PWR_CTRL macro