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Searched refs:regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_4_offset.h11739 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro
Ddcn_3_1_5_offset.h12475 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro
Ddcn_3_1_2_offset.h12610 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro
Ddcn_3_2_1_offset.h11819 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro
Ddcn_3_2_0_offset.h11810 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro
Ddcn_3_1_6_offset.h13206 #define regDSCC1_DSCC_INTERRUPT_CONTROL_STATUS_BASE_IDX … macro