Home
last modified time | relevance | path

Searched refs:regCP_HQD_SEMA_CMD_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h746 #define regCP_HQD_SEMA_CMD_BASE_IDX … macro
Dgc_9_4_3_offset.h3335 #define regCP_HQD_SEMA_CMD_BASE_IDX … macro
Dgc_11_0_0_offset.h4653 #define regCP_HQD_SEMA_CMD_BASE_IDX … macro
Dgc_11_0_3_offset.h4877 #define regCP_HQD_SEMA_CMD_BASE_IDX … macro