Searched refs:regCP_CPC_IC_OP_CNTL (Results 1 – 5 of 5) sorted by relevance
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v11_0.c | 2105 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_config_mec_cache() 2108 WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp); in gfx_v11_0_config_mec_cache() 2112 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_config_mec_cache() 2449 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_config_mec_cache_rs64() 2451 WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp); in gfx_v11_0_config_mec_cache_rs64() 2455 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_config_mec_cache_rs64() 3537 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64() 3539 WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp); in gfx_v11_0_cp_compute_load_microcode_rs64() 3543 tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64()
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_2_offset.h | 587 #define regCP_CPC_IC_OP_CNTL … macro
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D | gc_9_4_3_offset.h | 3048 #define regCP_CPC_IC_OP_CNTL … macro
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D | gc_11_0_0_offset.h | 7972 #define regCP_CPC_IC_OP_CNTL … macro
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D | gc_11_0_3_offset.h | 8288 #define regCP_CPC_IC_OP_CNTL … macro
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