Searched refs:rb_mask (Results 1 – 4 of 4) sorted by relevance
1360 u32 raster_config, unsigned rb_mask, in gfx_v6_0_write_harvested_raster_configs() argument1370 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1371 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1372 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1373 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1394 pkr0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1395 pkr1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1409 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1410 rb1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1425 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()[all …]
1637 unsigned rb_mask, unsigned num_rb) in gfx_v7_0_write_harvested_raster_configs() argument1646 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1647 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1648 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1649 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1684 pkr0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1685 pkr1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1700 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1701 rb1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1717 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()[all …]
3486 unsigned rb_mask, unsigned num_rb) in gfx_v8_0_write_harvested_raster_configs() argument3495 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3496 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3497 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3498 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3533 pkr0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3534 pkr1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3549 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3550 rb1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3566 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()[all …]
1571 u32 rb_mask; in gfx_v11_0_get_rb_active_bitmap() local1581 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()1584 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v11_0_get_rb_active_bitmap()
