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Searched refs:pll3 (Results 1 – 10 of 10) sorted by relevance

/Linux-v6.6/drivers/clk/sunxi/
DMakefile18 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-pll3.o
/Linux-v6.6/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.h207 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member
Dintel_dpll_mgr.c1962 PORT_PLL_M2_FRAC_ENABLE, pll->state.hw_state.pll3); in bxt_ddi_pll_enable()
2076 hw_state->pll3 = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 3)); in bxt_ddi_pll_get_hw_state()
2077 hw_state->pll3 &= PORT_PLL_M2_FRAC_ENABLE; in bxt_ddi_pll_get_hw_state()
2216 dpll_hw_state->pll3 = PORT_PLL_M2_FRAC_ENABLE; in bxt_ddi_set_dpll_hw_state()
2244 if (pll_state->pll3 & PORT_PLL_M2_FRAC_ENABLE) in bxt_ddi_pll_get_freq()
2340 hw_state->pll3, in bxt_dump_hw_state()
Dintel_display.c5331 PIPE_CONF_CHECK_X(dpll_hw_state.pll3); in intel_pipe_config_compare()
/Linux-v6.6/drivers/gpu/drm/tegra/
Dsor.c368 unsigned int pll3; member
2288 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2290 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2508 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2517 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2771 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_dp_enable()
2773 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_dp_enable()
3284 .pll3 = 0x1a,
3456 .pll3 = 0x1a,
3517 .pll3 = 0x166,
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/Linux-v6.6/drivers/clk/qcom/
Dgcc-ipq806x.c61 static struct clk_pll pll3 = { variable
324 { .hw = &pll3.clkr.hw },
385 { .hw = &pll3.clkr.hw },
3069 [PLL3] = &pll3.clkr,
Dgcc-msm8960.c28 static struct clk_pll pll3 = { variable
327 { .hw = &pll3.clkr.hw },
3242 [PLL3] = &pll3.clkr,
3470 [PLL3] = &pll3.clkr,
/Linux-v6.6/arch/arm/boot/dts/qcom/
Dqcom-msm8960.dtsi177 "pll3",
Dqcom-apq8064.dtsi861 "pll3",
/Linux-v6.6/arch/arm/boot/dts/renesas/
Dsh73a0.dtsi652 "pll3", "dsi0phy", "dsi1phy",