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Searched refs:num_valid_sets (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c340 int i, num_valid_sets; in dcn316_build_watermark_ranges() local
342 num_valid_sets = 0; in dcn316_build_watermark_ranges()
349 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn316_build_watermark_ranges()
350 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn316_build_watermark_ranges()
352 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn316_build_watermark_ranges()
353 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
355 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn316_build_watermark_ranges()
357 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn316_build_watermark_ranges()
360 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn316_build_watermark_ranges()
363 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn316_build_watermark_ranges()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c388 int i, num_valid_sets; in vg_build_watermark_ranges() local
390 num_valid_sets = 0; in vg_build_watermark_ranges()
397 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in vg_build_watermark_ranges()
398 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in vg_build_watermark_ranges()
400 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in vg_build_watermark_ranges()
401 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
403 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in vg_build_watermark_ranges()
405 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in vg_build_watermark_ranges()
408 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in vg_build_watermark_ranges()
411 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in vg_build_watermark_ranges()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c456 int i, num_valid_sets; in build_watermark_ranges() local
458 num_valid_sets = 0; in build_watermark_ranges()
465 ranges->reader_wm_sets[num_valid_sets].wm_inst = bw_params->wm_table.entries[i].wm_inst; in build_watermark_ranges()
466 ranges->reader_wm_sets[num_valid_sets].wm_type = bw_params->wm_table.entries[i].wm_type; in build_watermark_ranges()
468 …ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MI… in build_watermark_ranges()
469 …ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MA… in build_watermark_ranges()
472 if (ranges->reader_wm_sets[num_valid_sets].wm_type == WM_TYPE_PSTATE_CHG) { in build_watermark_ranges()
474 ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = 0; in build_watermark_ranges()
477 …ranges->reader_wm_sets[num_valid_sets].min_drain_clk_mhz = bw_params->clk_table.entries[i - 1].dcf… in build_watermark_ranges()
479 …ranges->reader_wm_sets[num_valid_sets].max_drain_clk_mhz = bw_params->clk_table.entries[i].dcfclk_… in build_watermark_ranges()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c423 int i, num_valid_sets; in dcn31_build_watermark_ranges() local
425 num_valid_sets = 0; in dcn31_build_watermark_ranges()
432 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn31_build_watermark_ranges()
433 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn31_build_watermark_ranges()
435 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn31_build_watermark_ranges()
436 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
438 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn31_build_watermark_ranges()
440 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn31_build_watermark_ranges()
443 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn31_build_watermark_ranges()
446 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn31_build_watermark_ranges()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c375 int i, num_valid_sets; in dcn315_build_watermark_ranges() local
377 num_valid_sets = 0; in dcn315_build_watermark_ranges()
384 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn315_build_watermark_ranges()
385 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn315_build_watermark_ranges()
387 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn315_build_watermark_ranges()
388 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
390 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn315_build_watermark_ranges()
392 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn315_build_watermark_ranges()
395 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn315_build_watermark_ranges()
398 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn315_build_watermark_ranges()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c441 int i, num_valid_sets; in dcn314_build_watermark_ranges() local
443 num_valid_sets = 0; in dcn314_build_watermark_ranges()
450 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn314_build_watermark_ranges()
451 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn314_build_watermark_ranges()
453 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn314_build_watermark_ranges()
454 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
456 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn314_build_watermark_ranges()
458 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn314_build_watermark_ranges()
461 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn314_build_watermark_ranges()
464 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn314_build_watermark_ranges()
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