Home
last modified time | relevance | path

Searched refs:nr_gate_clks (Results 1 – 15 of 15) sorted by relevance

/Linux-v6.6/drivers/clk/samsung/
Dclk-exynos7.c194 .nr_gate_clks = ARRAY_SIZE(topc_gate_clks),
386 .nr_gate_clks = ARRAY_SIZE(top0_gate_clks),
568 .nr_gate_clks = ARRAY_SIZE(top1_gate_clks),
615 .nr_gate_clks = ARRAY_SIZE(ccore_gate_clks),
682 .nr_gate_clks = ARRAY_SIZE(peric0_gate_clks),
806 .nr_gate_clks = ARRAY_SIZE(peric1_gate_clks),
861 .nr_gate_clks = ARRAY_SIZE(peris_gate_clks),
971 .nr_gate_clks = ARRAY_SIZE(fsys0_gate_clks),
1102 .nr_gate_clks = ARRAY_SIZE(fsys1_gate_clks),
1215 .nr_gate_clks = ARRAY_SIZE(mscl_gate_clks),
[all …]
Dclk-exynos850.c500 .nr_gate_clks = ARRAY_SIZE(top_gate_clks),
638 .nr_gate_clks = ARRAY_SIZE(apm_gate_clks),
921 .nr_gate_clks = ARRAY_SIZE(aud_gate_clks),
1024 .nr_gate_clks = ARRAY_SIZE(cmgp_gate_clks),
1122 .nr_gate_clks = ARRAY_SIZE(g3d_gate_clks),
1224 .nr_gate_clks = ARRAY_SIZE(hsi_gate_clks),
1356 .nr_gate_clks = ARRAY_SIZE(is_gate_clks),
1465 .nr_gate_clks = ARRAY_SIZE(mfcmscl_gate_clks),
1640 .nr_gate_clks = ARRAY_SIZE(peri_gate_clks),
1747 .nr_gate_clks = ARRAY_SIZE(core_gate_clks),
[all …]
Dclk-exynos5260.c152 .nr_gate_clks = ARRAY_SIZE(aud_gate_clks),
342 .nr_gate_clks = ARRAY_SIZE(disp_gate_clks),
506 .nr_gate_clks = ARRAY_SIZE(fsys_gate_clks),
597 .nr_gate_clks = ARRAY_SIZE(g2d_gate_clks),
660 .nr_gate_clks = ARRAY_SIZE(g3d_gate_clks),
793 .nr_gate_clks = ARRAY_SIZE(gscl_gate_clks),
912 .nr_gate_clks = ARRAY_SIZE(isp_gate_clks),
1032 .nr_gate_clks = ARRAY_SIZE(mfc_gate_clks),
1181 .nr_gate_clks = ARRAY_SIZE(mif_gate_clks),
1387 .nr_gate_clks = ARRAY_SIZE(peri_gate_clks),
[all …]
Dclk-exynos5-subcmu.c67 (*_cmu)->nr_gate_clks); in exynos5_subcmus_init()
110 samsung_clk_register_gate(ctx, info->gate_clks, info->nr_gate_clks); in exynos5_subcmu_probe()
Dclk-exynosautov9.c954 .nr_gate_clks = ARRAY_SIZE(top_gate_clks),
1014 .nr_gate_clks = ARRAY_SIZE(busmc_gate_clks),
1072 .nr_gate_clks = ARRAY_SIZE(core_gate_clks),
1312 .nr_gate_clks = ARRAY_SIZE(fsys0_gate_clks),
1439 .nr_gate_clks = ARRAY_SIZE(fsys1_gate_clks),
1506 .nr_gate_clks = ARRAY_SIZE(fsys2_gate_clks),
1761 .nr_gate_clks = ARRAY_SIZE(peric0_gate_clks),
2016 .nr_gate_clks = ARRAY_SIZE(peric1_gate_clks),
2063 .nr_gate_clks = ARRAY_SIZE(peris_gate_clks),
Dclk-exynos5-subcmu.h17 unsigned int nr_gate_clks; member
Dclk-exynos7885.c341 .nr_gate_clks = ARRAY_SIZE(top_gate_clks),
560 .nr_gate_clks = ARRAY_SIZE(peri_gate_clks),
669 .nr_gate_clks = ARRAY_SIZE(core_gate_clks),
751 .nr_gate_clks = ARRAY_SIZE(fsys_gate_clks),
Dclk-fsd.c302 .nr_gate_clks = ARRAY_SIZE(cmu_gate_clks),
665 .nr_gate_clks = ARRAY_SIZE(peric_gate_clks),
964 .nr_gate_clks = ARRAY_SIZE(fsys0_gate_clks),
1136 .nr_gate_clks = ARRAY_SIZE(fsys1_gate_clks),
1415 .nr_gate_clks = ARRAY_SIZE(imem_gate_clks),
1540 .nr_gate_clks = ARRAY_SIZE(mfc_gate_clks),
1744 .nr_gate_clks = ARRAY_SIZE(cam_csi_gate_clks),
Dclk-exynos5433.c819 .nr_gate_clks = ARRAY_SIZE(top_gate_clks),
902 .nr_gate_clks = ARRAY_SIZE(cpif_gate_clks),
1554 .nr_gate_clks = ARRAY_SIZE(mif_gate_clks),
1755 .nr_gate_clks = ARRAY_SIZE(peric_gate_clks),
1949 .nr_gate_clks = ARRAY_SIZE(peris_gate_clks),
2359 .nr_gate_clks = ARRAY_SIZE(fsys_gate_clks),
2484 .nr_gate_clks = ARRAY_SIZE(g2d_gate_clks),
2908 .nr_gate_clks = ARRAY_SIZE(disp_gate_clks),
3080 .nr_gate_clks = ARRAY_SIZE(aud_gate_clks),
3214 .nr_gate_clks = ARRAY_SIZE(bus##id##_gate_clks), \
[all …]
Dclk-exynos5420.c1333 .nr_gate_clks = ARRAY_SIZE(exynos5x_disp_gate_clks),
1343 .nr_gate_clks = ARRAY_SIZE(exynos5x_gsc_gate_clks),
1351 .nr_gate_clks = ARRAY_SIZE(exynos5x_g3d_gate_clks),
1361 .nr_gate_clks = ARRAY_SIZE(exynos5x_mfc_gate_clks),
1371 .nr_gate_clks = ARRAY_SIZE(exynos5x_mscl_gate_clks),
1379 .nr_gate_clks = ARRAY_SIZE(exynos5800_mau_gate_clks),
Dclk-exynos5410.c265 .nr_gate_clks = ARRAY_SIZE(exynos5410_gate_clks),
Dclk.h317 unsigned int nr_gate_clks; member
Dclk.c354 cmu->nr_gate_clks); in samsung_cmu_register_clocks()
Dclk-exynos3250.c810 .nr_gate_clks = ARRAY_SIZE(gate_clks),
1074 .nr_gate_clks = ARRAY_SIZE(isp_gate_clks),
Dclk-exynos5250.c681 .nr_gate_clks = ARRAY_SIZE(exynos5250_disp_gate_clks),