Searched refs:mmVGT_TF_MEMORY_BASE_HI_Sienna_Cichlid (Results 1 – 1 of 1) sorted by relevance
95 #define mmVGT_TF_MEMORY_BASE_HI_Sienna_Cichlid 0x0fc6 macro6997 (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI_Sienna_Cichlid) << in gfx_v10_0_setup_grbm_cam_remapping()
