/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_5_0_d.h | 43 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH 0x3c5e macro
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D | uvd_6_0_d.h | 54 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH 0x3c5e macro
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D | uvd_7_0_offset.h | 106 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
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/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
D | vcn_v2_0.c | 343 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 350 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 399 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_0_mc_resume_dpg_mode() 407 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 417 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_0_mc_resume_dpg_mode() 1895 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_0_start_sriov() 1905 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_0_start_sriov()
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D | vcn_v2_5.c | 427 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 434 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 481 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_5_mc_resume_dpg_mode() 489 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 499 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_5_mc_resume_dpg_mode() 1251 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_5_sriov_start() 1263 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v2_5_sriov_start()
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D | vcn_v3_0.c | 457 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 464 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 510 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v3_0_mc_resume_dpg_mode() 518 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 528 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v3_0_mc_resume_dpg_mode() 1339 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v3_0_start_sriov() 1350 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v3_0_start_sriov()
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D | uvd_v7_0.c | 684 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume() 693 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume() 828 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in uvd_v7_0_sriov_start() 835 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in uvd_v7_0_sriov_start()
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D | vcn_v1_0.c | 314 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 321 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 382 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_dpg_mode() 391 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_dpg_mode()
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D | uvd_v5_0.c | 284 WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v5_0_mc_resume()
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D | uvd_v6_0.c | 608 WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v6_0_mc_resume()
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_1_0_offset.h | 232 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
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D | vcn_2_5_offset.h | 867 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
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D | vcn_2_0_0_offset.h | 942 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
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D | vcn_3_0_0_offset.h | 1285 #define mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
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