Home
last modified time | relevance | path

Searched refs:mmUVD_JRBC_RB_REF_DATA (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Djpeg_v1_0.c84 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA); in jpeg_v1_0_decode_ring_set_patch_ring()
97 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0… in jpeg_v1_0_decode_ring_set_patch_ring()
255 PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_emit_fence()
338 PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_emit_ib()
358 PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_emit_reg_wait()
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h278 #define mmUVD_JRBC_RB_REF_DATA macro
Dvcn_2_5_offset.h145 #define mmUVD_JRBC_RB_REF_DATA macro
Dvcn_2_0_0_offset.h130 #define mmUVD_JRBC_RB_REF_DATA macro
Dvcn_3_0_0_offset.h343 #define mmUVD_JRBC_RB_REF_DATA macro