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Searched refs:mmTPC3_RTR_SPLIT_COEF_0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/accel/habanalabs/include/goya/asic_reg/
Dtpc3_rtr_regs.h142 #define mmTPC3_RTR_SPLIT_COEF_0 0xEC0400 macro
/Linux-v6.6/drivers/accel/habanalabs/goya/
Dgoya.c1775 WREG32(mmTPC3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()