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Searched refs:mmSPI_PS_INPUT_CNTL_21_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h3904 #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX … macro
Dgc_9_1_offset.h4134 #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX … macro
Dgc_9_2_1_offset.h4086 #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX … macro
Dgc_10_1_0_offset.h6304 #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX … macro
Dgc_10_3_0_offset.h5933 #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX … macro