Searched refs:mmSPI_CONFIG_CNTL_Sienna_Cichlid (Results 1 – 1 of 1) sorted by relevance
83 #define mmSPI_CONFIG_CNTL_Sienna_Cichlid 0x11ec macro7029 (SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL_Sienna_Cichlid) << in gfx_v10_0_setup_grbm_cam_remapping()
