Searched refs:mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE (Results 1 – 4 of 4) sorted by relevance
434 #define SFT_DCORE_OFFSET (mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE - mmSFT0_HBW_RTR_IF0_RTR_CTRL_BASE)
24343 #define mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE 0x4E50000ull macro
3228 instance_offset = mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE - mmSFT0_HBW_RTR_IF0_RTR_CTRL_BASE; in gaudi2_init_protection_bits()3601 instance_offset = mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE - mmSFT0_HBW_RTR_IF0_RTR_CTRL_BASE; in gaudi2_ack_protection_bits_errors()
288 {RAZWI_INITIATOR_ID_X_Y(18, 5, 18), mmSFT1_HBW_RTR_IF0_RTR_CTRL_BASE,