Searched refs:mmSDMA0_RLC0_RB_CNTL (Results 1 – 17 of 17) sorted by relevance
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_arcturus.c | 83 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 116 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 138 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_arcturus_hqd_sdma_load() 188 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_arcturus_hqd_sdma_load() 207 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_arcturus_hqd_sdma_dump() 235 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_arcturus_hqd_sdma_is_occupied() 255 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_arcturus_hqd_sdma_destroy() 257 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_arcturus_hqd_sdma_destroy() 271 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_arcturus_hqd_sdma_destroy() 272 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_arcturus_hqd_sdma_destroy()
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D | amdgpu_amdkfd_gfx_v10_3.c | 144 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 148 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 152 mmSDMA2_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 156 mmSDMA3_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 161 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 373 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in hqd_sdma_load_v10_3() 423 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in hqd_sdma_load_v10_3() 442 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in hqd_sdma_dump_v10_3() 492 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_is_occupied_v10_3() 562 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_destroy_v10_3() [all …]
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D | amdgpu_amdkfd_gfx_v7.c | 250 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 289 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 308 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 351 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 471 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 473 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 487 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 488 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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D | amdgpu_amdkfd_gfx_v8.c | 273 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 312 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 331 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 383 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 506 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 508 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 522 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 523 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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D | amdgpu_amdkfd_gfx_v10.c | 166 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, in get_sdma_rlc_reg_offset() 174 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL in get_sdma_rlc_reg_offset() 178 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 387 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 437 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 456 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 505 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 638 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 640 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 654 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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D | amdgpu_amdkfd_gfx_v9.c | 195 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 199 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 204 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 400 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 450 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 469 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 518 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 590 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 592 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 606 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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D | cikd.h | 563 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
D | sdma0_4_1_offset.h | 290 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | sdma0_4_0_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL 0x0140 macro
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D | sdma0_4_2_2_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | sdma0_4_2_offset.h | 374 #define mmSDMA0_RLC0_RB_CNTL … macro
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 214 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_3_0_1_d.h | 253 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_3_0_d.h | 375 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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D | oss_2_0_d.h | 268 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_10_1_0_offset.h | 370 #define mmSDMA0_RLC0_RB_CNTL … macro
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D | gc_10_3_0_offset.h | 368 #define mmSDMA0_RLC0_RB_CNTL … macro
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