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Searched refs:mmPHYPLLC_PIXCLK_RESYNC_CNTL (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_d.h1071 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x102 macro
Ddce_12_0_offset.h654 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h204 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_1_0_offset.h468 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_1_0_offset.h156 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_2_offset.h136 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_0_0_offset.h136 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_0_offset.h118 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro