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Searched refs:mmMC_PLL_DIV_SEL_0 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/accel/habanalabs/include/goya/asic_reg/
Dmc_pll_regs.h60 #define mmMC_PLL_DIV_SEL_0 0x4A1280 macro
/Linux-v6.6/drivers/accel/habanalabs/goya/
Dgoya.c1411 WREG32(mmMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()