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Searched refs:mmJPEG_CGC_CTRL (Results 1 – 9 of 9) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Djpeg_v3_0.c229 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL); in jpeg_v3_0_disable_clock_gating()
237 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v3_0_disable_clock_gating()
247 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL); in jpeg_v3_0_disable_clock_gating()
252 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v3_0_disable_clock_gating()
Djpeg_v2_0.c265 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL); in jpeg_v2_0_disable_clock_gating()
273 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v2_0_disable_clock_gating()
288 data = RREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL); in jpeg_v2_0_enable_clock_gating()
296 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v2_0_enable_clock_gating()
Djpeg_v2_5.c279 data = RREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL); in jpeg_v2_5_disable_clock_gating()
287 WREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL, data); in jpeg_v2_5_disable_clock_gating()
296 data = RREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL); in jpeg_v2_5_disable_clock_gating()
301 WREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL, data); in jpeg_v2_5_disable_clock_gating()
Dvcn_v1_0.c456 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL); in vcn_v1_0_disable_clock_gating()
465 WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data); in vcn_v1_0_disable_clock_gating()
582 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL); in vcn_v1_0_enable_clock_gating()
589 WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data); in vcn_v1_0_enable_clock_gating()
653 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmJPEG_CGC_CTRL, reg_data, 0xFFFFFFFF, sram_sel); in vcn_v1_0_clock_gating_dpg_mode()
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_offset.h156 #define mmJPEG_CGC_CTRL macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h334 #define mmJPEG_CGC_CTRL macro
Dvcn_2_5_offset.h365 #define mmJPEG_CGC_CTRL macro
Dvcn_2_0_0_offset.h350 #define mmJPEG_CGC_CTRL macro
Dvcn_3_0_0_offset.h633 #define mmJPEG_CGC_CTRL macro