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Searched refs:mmGCVM_L2_CACHE_PARITY_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h3252 #define mmGCVM_L2_CACHE_PARITY_CNTL_BASE_IDX … macro
Dgc_10_3_0_offset.h3157 #define mmGCVM_L2_CACHE_PARITY_CNTL_BASE_IDX … macro