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Searched refs:mmGB_MACROTILE_MODE0 (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dcik.c1098 {mmGB_MACROTILE_MODE0},
1194 case mmGB_MACROTILE_MODE0: in cik_get_register_value()
1210 idx = (reg_offset - mmGB_MACROTILE_MODE0); in cik_get_register_value()
Dvi.c722 {mmGB_MACROTILE_MODE0},
817 case mmGB_MACROTILE_MODE0: in vi_get_register_value()
833 idx = (reg_offset - mmGB_MACROTILE_MODE0); in vi_get_register_value()
Dgfx_v8_0.c2259 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2449 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2638 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
2841 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3043 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3214 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
3391 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]); in gfx_v8_0_tiling_mode_table_init()
Dgfx_v7_0.c1183 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
1366 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
1536 WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]); in gfx_v7_0_tiling_mode_table_init()
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h724 #define mmGB_MACROTILE_MODE0 0x2664 macro
Dgfx_7_2_d.h737 #define mmGB_MACROTILE_MODE0 0x2664 macro
Dgfx_8_0_d.h809 #define mmGB_MACROTILE_MODE0 0x2664 macro
Dgfx_8_1_d.h809 #define mmGB_MACROTILE_MODE0 0x2664 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h1011 #define mmGB_MACROTILE_MODE0 macro
Dgc_9_1_offset.h981 #define mmGB_MACROTILE_MODE0 macro
Dgc_9_2_1_offset.h947 #define mmGB_MACROTILE_MODE0 macro
Dgc_10_1_0_offset.h2923 #define mmGB_MACROTILE_MODE0 macro