Searched refs:mmCP_HQD_PQ_DOORBELL_CONTROL (Results 1 – 19 of 19) sorted by relevance
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_gfx_v7.c | 184 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data); in kgd_hqd_load() 373 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 0); in kgd_hqd_destroy()
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D | mes_v10_1.c | 753 data = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); 756 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data); 787 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
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D | amdgpu_amdkfd_gfx_v8.c | 208 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data); in kgd_hqd_load()
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D | amdgpu_amdkfd_gfx_v10_3.c | 220 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data); in hqd_load_v10_3()
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D | amdgpu_amdkfd_gfx_v10.c | 234 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data); in kgd_hqd_load()
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D | amdgpu_amdkfd_gfx_v9.c | 248 WREG32_RLC(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_HQD_PQ_DOORBELL_CONTROL), in kgd_gfx_v9_hqd_load()
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D | gfx_v9_0.c | 3274 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); in gfx_v9_0_mqd_init() 3387 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_kiq_init_register() 3457 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_kiq_init_register() 3512 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000); in gfx_v9_0_kiq_fini_register() 3513 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0); in gfx_v9_0_kiq_fini_register()
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D | gfx_v7_0.c | 2871 RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); in gfx_v7_0_mqd_init() 2926 RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); in gfx_v7_0_mqd_init()
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D | gfx_v10_0.c | 6531 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); in gfx_v10_0_compute_mqd_init() 6651 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0); in gfx_v10_0_kiq_init_register() 6703 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_kiq_init_register()
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D | gfx_v8_0.c | 4441 tmp = REG_SET_FIELD(RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL), in gfx_v8_0_mqd_init() 4491 tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); in gfx_v8_0_mqd_init()
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_7_0_d.h | 582 #define mmCP_HQD_PQ_DOORBELL_CONTROL 0x3254 macro
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D | gfx_7_2_d.h | 595 #define mmCP_HQD_PQ_DOORBELL_CONTROL 0x3254 macro
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D | gfx_8_0_d.h | 645 #define mmCP_HQD_PQ_DOORBELL_CONTROL 0x3254 macro
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D | gfx_8_1_d.h | 645 #define mmCP_HQD_PQ_DOORBELL_CONTROL 0x3254 macro
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/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 2849 #define mmCP_HQD_PQ_DOORBELL_CONTROL … macro
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D | gc_9_1_offset.h | 3077 #define mmCP_HQD_PQ_DOORBELL_CONTROL … macro
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D | gc_9_2_1_offset.h | 3033 #define mmCP_HQD_PQ_DOORBELL_CONTROL … macro
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D | gc_10_1_0_offset.h | 5331 #define mmCP_HQD_PQ_DOORBELL_CONTROL … macro
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D | gc_10_3_0_offset.h | 4966 #define mmCP_HQD_PQ_DOORBELL_CONTROL … macro
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