Searched refs:minimum_clocks (Results 1 – 2 of 2) sorted by relevance
3266 struct PP_Clocks minimum_clocks = {0}; in vega10_apply_state_adjust_rules() local3306 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in vega10_apply_state_adjust_rules()3307 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()3337 minimum_clocks.engineClock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()3338 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()3359 if (sclk < minimum_clocks.engineClock) in vega10_apply_state_adjust_rules()3360 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()3361 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()3363 if (mclk < minimum_clocks.memoryClock) in vega10_apply_state_adjust_rules()3364 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in vega10_apply_state_adjust_rules()[all …]
3321 struct PP_Clocks minimum_clocks = {0}; in smu7_apply_state_adjust_rules() local3353 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()3354 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()3376 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()3377 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()3408 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()3409 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()3410 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()3412 if (mclk < minimum_clocks.memoryClock) in smu7_apply_state_adjust_rules()3413 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()[all …]
