Searched refs:mgpu_info (Results 1 – 5 of 5) sorted by relevance
212 struct amdgpu_mgpu_info mgpu_info = { variable213 .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),215 mgpu_info.delayed_reset_work,2321 mutex_lock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2322 if (mgpu_info.pending_reset == true) { in amdgpu_drv_delayed_reset_work_handler()2323 mutex_unlock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2326 mgpu_info.pending_reset = true; in amdgpu_drv_delayed_reset_work_handler()2327 mutex_unlock(&mgpu_info.mutex); in amdgpu_drv_delayed_reset_work_handler()2333 for (i = 0; i < mgpu_info.num_dgpu; i++) { in amdgpu_drv_delayed_reset_work_handler()2334 adev = mgpu_info.gpu_ins[i].adev; in amdgpu_drv_delayed_reset_work_handler()[all …]
53 mutex_lock(&mgpu_info.mutex); in amdgpu_unregister_gpu_instance()55 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_unregister_gpu_instance()56 gpu_instance = &(mgpu_info.gpu_ins[i]); in amdgpu_unregister_gpu_instance()58 mgpu_info.gpu_ins[i] = in amdgpu_unregister_gpu_instance()59 mgpu_info.gpu_ins[mgpu_info.num_gpu - 1]; in amdgpu_unregister_gpu_instance()60 mgpu_info.num_gpu--; in amdgpu_unregister_gpu_instance()62 mgpu_info.num_apu--; in amdgpu_unregister_gpu_instance()64 mgpu_info.num_dgpu--; in amdgpu_unregister_gpu_instance()69 mutex_unlock(&mgpu_info.mutex); in amdgpu_unregister_gpu_instance()103 mutex_lock(&mgpu_info.mutex); in amdgpu_register_gpu_instance()[all …]
2603 mutex_lock(&mgpu_info.mutex); in amdgpu_device_enable_mgpu_fan_boost()2610 if (mgpu_info.num_dgpu < 2) in amdgpu_device_enable_mgpu_fan_boost()2613 for (i = 0; i < mgpu_info.num_dgpu; i++) { in amdgpu_device_enable_mgpu_fan_boost()2614 gpu_ins = &(mgpu_info.gpu_ins[i]); in amdgpu_device_enable_mgpu_fan_boost()2627 mutex_unlock(&mgpu_info.mutex); in amdgpu_device_enable_mgpu_fan_boost()2687 mutex_lock(&mgpu_info.mutex); in amdgpu_device_ip_late_init()2702 if (mgpu_info.num_dgpu == adev->gmc.xgmi.num_physical_nodes) { in amdgpu_device_ip_late_init()2703 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_device_ip_late_init()2704 gpu_instance = &(mgpu_info.gpu_ins[i]); in amdgpu_device_ip_late_init()2717 mutex_unlock(&mgpu_info.mutex); in amdgpu_device_ip_late_init()[all …]
199 extern struct amdgpu_mgpu_info mgpu_info;
1823 mutex_lock(&mgpu_info.mutex); in amdgpu_show_powershift_percent()1824 for (i = 0; i < mgpu_info.num_gpu; i++) { in amdgpu_show_powershift_percent()1825 if (mgpu_info.gpu_ins[i].adev->flags & AMD_IS_APU) { in amdgpu_show_powershift_percent()1826 adev = mgpu_info.gpu_ins[i].adev; in amdgpu_show_powershift_percent()1830 mutex_unlock(&mgpu_info.mutex); in amdgpu_show_powershift_percent()
