Searched refs:mec_hdr (Results 1 – 6 of 6) sorted by relevance
2392 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_mec_cache_rs64() local2394 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_mec_cache_rs64()2417 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_mec_cache_rs64()2418 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_mec_cache_rs64()2420 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_mec_cache_rs64()2474 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_gfx_rs64() local2477 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_gfx_rs64()2532 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_gfx_rs64()2533 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_gfx_rs64()2535 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_gfx_rs64()[all …]
459 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_mec_init() local497 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_mec_init()501 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_mec_init()502 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_4_3_mec_init()504 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_4_3_mec_init()1397 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_xcc_cp_compute_load_microcode() local1409 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_xcc_cp_compute_load_microcode()1410 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_4_3_xcc_cp_compute_load_microcode()1414 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_xcc_cp_compute_load_microcode()1431 WREG32(mec_ucode_addr_offset, mec_hdr->jt_offset); in gfx_v9_4_3_xcc_cp_compute_load_microcode()[all …]
1690 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local1716 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()1720 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()1721 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init()1723 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()3168 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local3178 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()3179 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()3183 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()3196 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
2649 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local2656 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode()2657 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode()2658 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode()2660 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode()2667 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode()2668 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
4201 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local4228 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()4231 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()4232 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()4234 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()6235 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local6246 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()6247 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()6251 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()6289 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]
4256 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4261 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4265 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4266 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4270 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
