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Searched refs:masks (Results 1 – 25 of 240) sorted by relevance

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/Linux-v6.6/drivers/clk/mmp/
Dclk-frac.c35 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_round_rate()
54 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
61 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
64 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
71 do_div(rate, num * factor->masks->factor); in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
90 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_set_rate()
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
104 val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift; in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
[all …]
/Linux-v6.6/drivers/clk/spear/
Dclk-aux-synth.c77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
78 if (eqn == aux->masks->eq1_mask) in clk_aux_recalc_rate()
82 num = (val >> aux->masks->xscale_sel_shift) & in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
86 den *= (val >> aux->masks->yscale_sel_shift) & in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
112 val |= (rtbl[i].eq & aux->masks->eq_sel_mask) << in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
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/Linux-v6.6/lib/
Dgroup_cpus.c47 cpumask_var_t *masks; in alloc_node_to_cpumask() local
50 masks = kcalloc(nr_node_ids, sizeof(cpumask_var_t), GFP_KERNEL); in alloc_node_to_cpumask()
51 if (!masks) in alloc_node_to_cpumask()
55 if (!zalloc_cpumask_var(&masks[node], GFP_KERNEL)) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
63 free_cpumask_var(masks[node]); in alloc_node_to_cpumask()
64 kfree(masks); in alloc_node_to_cpumask()
68 static void free_node_to_cpumask(cpumask_var_t *masks) in free_node_to_cpumask() argument
73 free_cpumask_var(masks[node]); in free_node_to_cpumask()
74 kfree(masks); in free_node_to_cpumask()
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/Linux-v6.6/kernel/irq/
Daffinity.c29 struct irq_affinity_desc *masks = NULL; in irq_create_affinity_masks() local
59 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in irq_create_affinity_masks()
60 if (!masks) in irq_create_affinity_masks()
65 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
77 kfree(masks); in irq_create_affinity_masks()
82 cpumask_copy(&masks[curvec + j].mask, &result[j]); in irq_create_affinity_masks()
95 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
99 masks[i].is_managed = 1; in irq_create_affinity_masks()
101 return masks; in irq_create_affinity_masks()
/Linux-v6.6/drivers/net/dsa/microchip/
Dksz8795.c165 const u32 *masks; in ksz8_r_mib_cnt() local
172 masks = dev->info->masks; in ksz8_r_mib_cnt()
187 if (check & masks[MIB_COUNTER_VALID]) { in ksz8_r_mib_cnt()
189 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8_r_mib_cnt()
201 const u32 *masks; in ksz8795_r_mib_pkt() local
208 masks = dev->info->masks; in ksz8795_r_mib_pkt()
225 if (check & masks[MIB_COUNTER_VALID]) { in ksz8795_r_mib_pkt()
234 if (check & masks[MIB_COUNTER_OVERFLOW]) { in ksz8795_r_mib_pkt()
240 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8795_r_mib_pkt()
386 const u32 *masks; in ksz8_valid_dyn_entry() local
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/Linux-v6.6/block/
Dblk-mq-cpumap.c20 const struct cpumask *masks; in blk_mq_map_queues() local
23 masks = group_cpus_evenly(qmap->nr_queues); in blk_mq_map_queues()
24 if (!masks) { in blk_mq_map_queues()
31 for_each_cpu(cpu, &masks[queue]) in blk_mq_map_queues()
34 kfree(masks); in blk_mq_map_queues()
/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp_cm.c119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
214 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
216 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
261 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dpp1_cm_get_reg_field()
263 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
265 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dpp1_cm_get_reg_field()
267 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
270 reg->masks.field_region_end = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
272 reg->masks.field_region_end_slope = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B; in dpp1_cm_get_reg_field()
[all …]
/Linux-v6.6/arch/riscv/mm/
Dpageattr.c19 struct pageattr_masks *masks = walk->private; in set_pageattr_masks() local
22 new_val &= ~(pgprot_val(masks->clear_mask)); in set_pageattr_masks()
23 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
114 struct pageattr_masks masks = { in __set_memory() local
124 &masks); in __set_memory()
165 struct pageattr_masks masks = { in set_direct_map_invalid_noflush() local
171 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_invalid_noflush()
182 struct pageattr_masks masks = { in set_direct_map_default_noflush() local
188 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_default_noflush()
/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dce/
Ddce_i2c_hw.c41 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
80 else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK) in get_channel_status()
82 else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT) in get_channel_status()
84 else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED) in get_channel_status()
86 else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE) in get_channel_status()
287 if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL) in set_speed()
622 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
629 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
645 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
652 masks); in dce100_i2c_hw_construct()
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Ddce_i2c_hw.h292 const struct dce_i2c_mask *masks; member
301 const struct dce_i2c_mask *masks);
309 const struct dce_i2c_mask *masks);
317 const struct dce_i2c_mask *masks);
325 const struct dce_i2c_mask *masks);
333 const struct dce_i2c_mask *masks);
/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb_cm.c53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
64 reg->masks.exp_region1_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
73 reg->masks.field_region_linear_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_SLOPE_B; in dwb3_get_reg_field_ogam()
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Ddcn30_dpp_cm.c177 reg->masks.field_region_start_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_BASE_B; in dpp3_gamcor_reg_field()
179 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
182 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
184 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
186 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
188 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
191 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
193 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
195 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
197 reg->masks.field_region_linear_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_SLOPE_B; in dpp3_gamcor_reg_field()
[all …]
/Linux-v6.6/drivers/clk/uniphier/
Dclk-uniphier-mux.c17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
/Linux-v6.6/drivers/virtio/
Dvirtio_vdpa.c306 struct cpumask *masks = NULL; in create_affinity_masks() local
319 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in create_affinity_masks()
320 if (!masks) in create_affinity_masks()
325 cpumask_setall(&masks[curvec]); in create_affinity_masks()
333 kfree(masks); in create_affinity_masks()
338 cpumask_copy(&masks[curvec + j], &result[j]); in create_affinity_masks()
351 cpumask_setall(&masks[curvec]); in create_affinity_masks()
353 return masks; in create_affinity_masks()
367 struct cpumask *masks; in virtio_vdpa_find_vqs() local
373 masks = create_affinity_masks(nvqs, desc ? desc : &default_affd); in virtio_vdpa_find_vqs()
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/Linux-v6.6/drivers/net/ethernet/intel/ice/
Dice_flex_pipe.c1173 for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first + in ice_prof_has_mask_idx()
1174 hw->blk[blk].masks.count; i++) in ice_prof_has_mask_idx()
1176 if (hw->blk[blk].masks.masks[i].in_use && in ice_prof_has_mask_idx()
1177 hw->blk[blk].masks.masks[i].idx == idx) { in ice_prof_has_mask_idx()
1179 if (hw->blk[blk].masks.masks[i].mask == mask) in ice_prof_has_mask_idx()
1203 ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks) in ice_prof_has_mask() argument
1209 if (!ice_prof_has_mask_idx(hw, blk, prof, i, masks[i])) in ice_prof_has_mask()
1225 struct ice_fv_word *fv, u16 *masks, u8 *prof_id) in ice_find_prof_id_with_mask() argument
1243 if (masks && !ice_prof_has_mask(hw, blk, i, masks)) in ice_find_prof_id_with_mask()
1472 mutex_init(&hw->blk[blk].masks.lock); in ice_init_prof_masks()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c165 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_output_csc()
167 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_output_csc()
223 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
225 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
251 reg->masks.exp_region0_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
253 reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
255 reg->masks.exp_region1_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
257 reg->masks.exp_region1_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
259 reg->masks.field_region_end = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
261 reg->masks.field_region_end_slope = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
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/Linux-v6.6/drivers/s390/char/
Dsclp.h98 u8 masks[4 * 1021]; /* variable length */ member
109 static inline sccb_mask_t sccb_get_mask(u8 *masks, size_t len, int i) in sccb_get_mask() argument
113 memcpy(&res, masks + i * len, min(sizeof(res), len)); in sccb_get_mask()
117 static inline void sccb_set_mask(u8 *masks, size_t len, int i, sccb_mask_t val) in sccb_set_mask() argument
119 memset(masks + i * len, 0, len); in sccb_set_mask()
120 memcpy(masks + i * len, &val, min(sizeof(val), len)); in sccb_set_mask()
127 sccb_get_mask(__sccb->masks, __sccb->mask_length, i); \
138 sccb_set_mask(__sccb->masks, __sccb->mask_length, i, val); \
/Linux-v6.6/Documentation/devicetree/bindings/sound/
Dtdm-slot.txt20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
/Linux-v6.6/kernel/sched/
Dtopology.c1829 struct cpumask ***masks; in sched_init_numa() local
1891 masks = kzalloc(sizeof(void *) * nr_levels, GFP_KERNEL); in sched_init_numa()
1892 if (!masks) in sched_init_numa()
1900 masks[i] = kzalloc(nr_node_ids * sizeof(void *), GFP_KERNEL); in sched_init_numa()
1901 if (!masks[i]) in sched_init_numa()
1911 masks[i][j] = mask; in sched_init_numa()
1924 rcu_assign_pointer(sched_domains_numa_masks, masks); in sched_init_numa()
1975 struct cpumask ***masks; in sched_reset_numa() local
1983 masks = sched_domains_numa_masks; in sched_reset_numa()
1985 if (distances || masks) { in sched_reset_numa()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_hubbub.c38 hubbub1->shifts->field_name, hubbub1->masks->field_name
48 hubbub1->shifts->field_name, hubbub1->masks->field_name
79 hubbub3->masks = hubbub_mask; in hubbub301_construct()
/Linux-v6.6/drivers/pci/msi/
Dmsi.c282 struct irq_affinity_desc *masks) in msi_setup_msi_desc() argument
304 desc.affinity = masks; in msi_setup_msi_desc()
350 struct irq_affinity_desc *masks = NULL; in msi_capability_init() local
366 masks = irq_create_affinity_masks(nvec, affd); in msi_capability_init()
369 ret = msi_setup_msi_desc(dev, nvec, masks); in msi_capability_init()
401 kfree(masks); in msi_capability_init()
608 int nvec, struct irq_affinity_desc *masks) in msix_setup_msi_descs() argument
616 for (i = 0, curmsk = masks; i < nvec; i++, curmsk++) { in msix_setup_msi_descs()
618 desc.affinity = masks ? curmsk : NULL; in msix_setup_msi_descs()
657 struct irq_affinity_desc *masks = NULL; in msix_setup_interrupts() local
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/Linux-v6.6/drivers/clk/starfive/
Dclk-starfive-jh7110-pll.c103 } masks; member
122 .masks = { \
285 ret->dacpd = (val & info->masks.dacpd) >> info->shifts.dacpd; in jh7110_pll_regvals_get()
286 ret->dsmpd = (val & info->masks.dsmpd) >> info->shifts.dsmpd; in jh7110_pll_regvals_get()
289 ret->fbdiv = (val & info->masks.fbdiv) >> info->shifts.fbdiv; in jh7110_pll_regvals_get()
379 regmap_update_bits(priv->regmap, info->offsets.pd, info->masks.dacpd, in jh7110_pll_set_rate()
381 regmap_update_bits(priv->regmap, info->offsets.pd, info->masks.dsmpd, in jh7110_pll_set_rate()
385 regmap_update_bits(priv->regmap, info->offsets.fbdiv, info->masks.fbdiv, in jh7110_pll_set_rate()
/Linux-v6.6/tools/perf/trace/beauty/
Dprctl.c65 const u8 masks[] = { in syscall_arg__scnprintf_prctl_option() local
78 if (option < ARRAY_SIZE(masks)) in syscall_arg__scnprintf_prctl_option()
79 arg->mask |= masks[option]; in syscall_arg__scnprintf_prctl_option()
/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hubbub.c41 hubbub1->shifts->field_name, hubbub1->masks->field_name
51 hubbub1->shifts->field_name, hubbub1->masks->field_name
103 hubbub->masks = hubbub_mask; in hubbub201_construct()
/Linux-v6.6/net/openvswitch/
Dflow_table.c262 if (ovsl_dereference(old->masks[i])) in tbl_mask_array_realloc()
263 new->masks[new->count++] = old->masks[i]; in tbl_mask_array_realloc()
293 BUG_ON(ovsl_dereference(ma->masks[ma_count])); in tbl_mask_array_add_mask()
295 rcu_assign_pointer(ma->masks[ma_count], new); in tbl_mask_array_add_mask()
309 if (mask == ovsl_dereference(ma->masks[i])) in tbl_mask_array_del_mask()
319 rcu_assign_pointer(ma->masks[i], ma->masks[ma_count - 1]); in tbl_mask_array_del_mask()
320 RCU_INIT_POINTER(ma->masks[ma_count - 1], NULL); in tbl_mask_array_del_mask()
744 mask = rcu_dereference_ovsl(ma->masks[*index]); in flow_lookup()
762 mask = rcu_dereference_ovsl(ma->masks[i]); in flow_lookup()
883 mask = ovsl_dereference(ma->masks[i]); in ovs_flow_tbl_lookup_exact()
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