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Searched refs:mask_offset (Results 1 – 10 of 10) sorted by relevance

/Linux-v6.6/arch/arm/mach-omap1/
Dmux.h29 .mask_offset = mode_offset, \
43 .mask_offset = mode_offset, \
54 .mask_offset = mode_offset, \
66 .mask_offset = mode_offset, \
109 const unsigned char mask_offset; member
Dmux.c302 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
306 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
/Linux-v6.6/drivers/perf/hisilicon/
Dhisi_uncore_pa_pmu.c56 u32 mask_offset; member
238 val = readl(pa_pmu->base + regs->mask_offset); in hisi_pa_pmu_enable_counter_int()
240 writel(val, pa_pmu->base + regs->mask_offset); in hisi_pa_pmu_enable_counter_int()
250 val = readl(pa_pmu->base + regs->mask_offset); in hisi_pa_pmu_disable_counter_int()
252 writel(val, pa_pmu->base + regs->mask_offset); in hisi_pa_pmu_disable_counter_int()
383 .mask_offset = PA_INT_MASK,
417 .mask_offset = H60PA_INT_MASK,
/Linux-v6.6/arch/arm/plat-orion/
Dgpio.c47 int mask_offset; member
84 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
89 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
521 void __iomem *base, int mask_offset, in orion_gpio_init() argument
554 ochip->mask_offset = mask_offset; in orion_gpio_init()
583 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
591 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
/Linux-v6.6/arch/arm/mach-davinci/
Dmux.c70 mask = (cfg->mask << cfg->mask_offset); in davinci_cfg_reg()
74 tmp2 = (cfg->mode << cfg->mask_offset); in davinci_cfg_reg()
Dmux.h18 const unsigned char mask_offset; member
674 .mask_offset = mode_offset, \
685 .mask_offset = mode_offset, \
696 .mask_offset = mode_offset, \
/Linux-v6.6/drivers/irqchip/
Dirq-brcmstb-l2.c59 int mask_offset; member
100 ~(irq_reg_readl(b->gc, b->mask_offset)); in brcmstb_l2_intc_irq_handle()
230 data->mask_offset = init_params->cpu_mask_status; in brcmstb_l2_intc_of_init()
/Linux-v6.6/arch/arm/plat-orion/include/plat/
Dorion-gpio.h34 void __iomem *base, int mask_offset,
/Linux-v6.6/drivers/pinctrl/mediatek/
Dmtk-eint.c341 int offset, mask_offset, index; in mtk_eint_irq_handler() local
351 mask_offset = eint_num >> 5; in mtk_eint_irq_handler()
361 if (eint->wake_mask[mask_offset] & BIT(offset) && in mtk_eint_irq_handler()
362 !(eint->cur_mask[mask_offset] & BIT(offset))) { in mtk_eint_irq_handler()
/Linux-v6.6/drivers/pci/controller/
Dpcie-microchip-host.c212 .mask_offset = PCIE_EVENT_INT, \
220 .mask_offset = SEC_ERROR_INT_MASK, \
228 .mask_offset = DED_ERROR_INT_MASK, \
236 .mask_offset = IMASK_LOCAL, \
353 u32 mask_offset; member
778 event_descs[event].mask_offset; in mc_mask_event_irq()
808 event_descs[event].mask_offset; in mc_unmask_event_irq()