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Searched refs:lb_interrupt_mask (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Ddce_v10_0.c2989 u32 lb_interrupt_mask; in dce_v10_0_set_crtc_vblank_interrupt_state() local
2998 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state()
2999 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vblank_interrupt_state()
3001 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state()
3004 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state()
3005 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vblank_interrupt_state()
3007 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state()
3018 u32 lb_interrupt_mask; in dce_v10_0_set_crtc_vline_interrupt_state() local
3027 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vline_interrupt_state()
3028 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vline_interrupt_state()
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Ddce_v11_0.c3120 u32 lb_interrupt_mask; in dce_v11_0_set_crtc_vblank_interrupt_state() local
3129 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state()
3130 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vblank_interrupt_state()
3132 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state()
3135 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state()
3136 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vblank_interrupt_state()
3138 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state()
3149 u32 lb_interrupt_mask; in dce_v11_0_set_crtc_vline_interrupt_state() local
3158 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state()
3159 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vline_interrupt_state()
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Ddce_v8_0.c2886 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local
2919 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state()
2920 lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vblank_interrupt_state()
2921 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state()
2924 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state()
2925 lb_interrupt_mask |= LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vblank_interrupt_state()
2926 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state()
2937 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vline_interrupt_state() local
2970 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vline_interrupt_state()
2971 lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vline_interrupt_state()
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